Commit graph

18396 commits

Author SHA1 Message Date
Erwan Gouriou 11eac235bc Revert "sensors: lis3mdl: provide name to Kconfig choice"
This reverts commit 2e20f49167.

"choice" section in board Kconfig.default introduces a dependency
from the sensor to the board. Then a warning was generated
whenever the sensor is used on another board

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-13 09:06:58 -08:00
Erwan Gouriou 4ebbaa2bb0 boards: disco_l475_iot1: fix method to configure sensor triggers
Defining TRIGGER_MODE choices in board Kconfig.defconfig files
brings unwanted dependency and warning messages when using sensors
on other boards.
Change sensor configuration by enabling wanted trigger choice rather
than redefining choice.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-13 09:06:58 -08:00
Anas Nashif c3880c0db4 samples: crypto: increase min_ram for sample
This samples does not fit on platforms with 8k RAM, increase minimal
requirements.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-01-13 10:48:36 -05:00
Michael Hope 32a55e3fa3 boards: enable and document the SPI driver on the Arduino Zero.
Adds fixups, enables in the config, and enables the SPI4 port.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-13 07:39:05 -05:00
Michael Hope 73d045e281 spi: add a SPI driver for the SAM0 series.
Impleentation is master only and uses polling to read and write.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-13 07:39:05 -05:00
Michael Hope af0718dc3a spi: add Kconfig entries for SPI4 and SPI5.
The SAM0 series has up to 6 SPI ports.  Add Kconfig options to match.

Similar to the 9033fb2f01, this patch
only defines the fields that are currently used and skips ones like
GPIO and IRQ priority that aren't.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-13 07:39:05 -05:00
David B. Kinder fd04de2d10 doc: fix misspellings in Kconfig files
periodic scan for typos missed during normal reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-01-12 20:58:56 -05:00
Robert Chou b7af740f3a net: lwm2m: update observe_node when attributes are written or cleared
As title, we should update the existing observe_node when new attributes
are written from server side. Add the implementation to handle that.

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2018-01-12 20:57:34 -05:00
Robert Chou 2281f6fd7d net: lwm2m: get attributes from obj/obj_inst/res for observe_node
1. Read notification attributes set by server to setup the
   minimum/maximum notification period of a observation request.
2. Reordering to check observe_node duplication first
   (bailout earlier)
3. Simplify remove observe_node condition checking

NOTE: attributes are inheritable, priority: res > obj_inst > obj
Reference: LwM2M spec V1_0_1-20170704-A, section 5.1

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2018-01-12 20:57:34 -05:00
Robert Chou b0e7a039ee net: lwm2m: report attributes on discover op
Since we've added storing notification attributes written by server.
We can now append these attributes as part of link-format for discover
op.

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2018-01-12 20:57:34 -05:00
Robert Chou 09fcd83b98 net: lwm2m: add write-attribute WRITE support
Implement write-attribute on obj/obj_inst/res according to LwM2M spec
20170704-A, sec 5.1.2. Support pmin/pmax/st/gt/lt parameters on WRITE
operation.

The basic idea is to add sys_slist_t to obj/obj_inst/res structure.
And attach struct lwm2m_attr to the list when attributes are written
from server side (implement lwm2m_write_attr_handler accordingly)

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2018-01-12 20:57:34 -05:00
Jukka Rissanen ff22595c31 net: ip: shell: Fix ipv4 echo reply callback to unref packet
The ICMPv4 handler needs to unref the received echo reply packet
because we are returning NET_OK to caller. Similar change was done
for IPv6 earlier.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2018-01-12 20:51:32 -05:00
Kumar Gala b92a40a798 drivers: entropy: stm32: Remove STM32F411XE from building
It appears the STM32F411XE doesn't support RNG so remove enabling it
from the SoC defconfig and flag an error if attempting to build the
driver on that SoC.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-12 19:42:54 -05:00
Andrew Boie df48e11d98 build: warn user about Meltdown vulnerability
A fix for this issue is in progress, meanwhile warn the user that
they may be susceptible to this problem if they enable user mode on
an x86-based target that is not known to be immune.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-01-12 15:12:32 -08:00
Anas Nashif 3bbd1c77ab doc: recent kconfig changes break doc generation
Instead of wildcards we now are using environment variables to set the
path to Kconfig files for board and architecture. This break
documentation generation for Kconfig variables.

Using the env variables, we now set the path to what it used to be to
restore previous behavior.

Also, when something like this happens in the future, we should abort on
doc creation failure.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-01-12 15:34:09 -05:00
Andrew Boie dff0cb2d65 tests: userbuffer_validate: move and rename
What this test actually does is verify internal APIs for manipulating
the MMU specifically on the X86. It is not compatible with other arches.
Moved to live with the rest of the memory protection tests.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-01-12 13:22:10 -05:00
Manivannan Sadhasivam 1bd48edd26 drivers: i2c: stm32f4: Add check for BTF flag before reading N-2 byte
According to STM32F4 reference manual, software should wait for BTF=1
before reading N-2 data byte.

Reference:

"For N >2 -byte reception, from N-2 data reception" section, page
853 of STM32F4 Reference manual.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-01-12 09:33:27 -06:00
Sebastian Bøe 8b6d3ad69b cmake: Improve error messages for detecting libgcc
Use two different variables for the distinct values LIBGCC_FILE_NAME
and LIBGCC_DIR and assert that each of them exists.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 08:37:41 -05:00
Sebastian Bøe 15ca6da4c8 cmake: Re-introduce support for CROSS_COMPILE
CROSS_COMPILE is a KBuild feature that was dropped during the CMake
migration. It is now re-introduced. Documentation for it is still
lacking, but at least it now behaves as expected.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 08:37:41 -05:00
Sebastian Bøe a896be1192 cmake: toolchain: Misc. comment cleanups
Sync the outdated comments with the code. E.g. there is no
toolchain-clang.cmake, but there is a toolchain-host-gcc.cmake.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 08:37:41 -05:00
Mariusz Skamra bf58fb481b Bluetooth: tester: Add Configuration and Health Client models
PTS requires the composition data of size that cannot be sent in
single PDU. This patch adds Configuration and Health Client models
to the root_models to increase the Elements size in Composition Data
Page 0.

Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
2018-01-12 15:10:24 +02:00
Sebastian Bøe 2612744352 cmake: Don't specify a C standard when building Kconfig
Specifying a C standard triggered a compiler warning on Ubuntu (gcc
5.4.0) and a compiler error on Mac OS 10.12.6. Omit specifying the
standard and let the host toolchain use it's default instead. Tested
on Mac OS and Ubuntu 16.04.3.

This fixes #5640

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 08:05:35 -05:00
Johan Hedberg 47a28a9612 mempool: Remove unnecessary call to get_pool()
The pointer that get_pool() returns is already stored in the 'p'
variable.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2018-01-12 08:05:08 -05:00
Johan Hedberg 1a8a8d9019 mempool: Don't store redundant information for k_malloc/k_free
We don't need to store the full k_mem_block, rather just the
k_mem_block_id. In effect, this saves 4 bytes of memory per allocated
memory chunk. Also take advantage of the newly introduced
k_mem_pool_free_id API here.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2018-01-12 08:05:08 -05:00
Johan Hedberg 7d887cb615 mempool: Add k_mem_pool_free_id API
The k_mem_pool_free API has no use for the full k_mem_block struct. In
particular, it only needs the k_mem_block_id. Introduce a new API
which takes only this essential struct. This paves the way to
simplify & improve the k_malloc/k_free implementation a bit.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2018-01-12 08:05:08 -05:00
Andrei Emeltchenko af0bf06aa3 usb: Fix USB Device dependency
USB Device stack should depend on supported drivers not on menuconfig
option.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2018-01-12 07:46:28 -05:00
Sebastian Bøe 4b61bd1b7a kconfig: Prune kconfig files that don't match the ARCH or BOARD
When Kconfiglib was introduced it caused a significant performance
issue. This patch uses pruning to mitigate the performance issue.

The pruning exploits the fact that before the Kconfig database is
parsed we already know what ARCH and BOARD has been selected. So in
theory we could prune away all Kconfig sources that are not related to
the current ARCH or BOARD. In practice, it is only the Kconfig sources
in zephyr/arch/$ARCH and zephyr/board/$ARCH/ that are easy to prune.

Still, that is quite a few Kconfig sources. For qemu_x86 this patch
reduced the number of parsed Kconfig source files from 632 to
272. This pruning resulted in a incremental reconfiguration (time
cmake ..) speedup of 21% (0.56s to 0.46) and a clean build speedup of
4% (Using board qemu_x86 and sample hello_world).

Furthermore, it should be easier to maintain ARCH's and BOARD's
out-of-tree since the user now has a mechanism to redirect where
Kconfig sources are found. But this has not been explored.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Sebastian Bøe a8b361b176 cmake: kconfig: Run Kconfig on every reconfiguration
Kconfiglib does not support merging fragments without parsing the
entire Kconfig "database". For Zephyr this means we no longer get a
performance gain from splitting up the fragment-merging and the
.config generation.

This patch removes the seperated merge step and it's associated
caching mechanism. Now we do a full Kconfig execution on every
reconfiguration.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Carles Cufi d92769b849 scripts: kconfig: Replace Kconfig exectuables with Python
We have been using a fork of the Linux kernel's Kconfig system to
configure the Zephyr tree. The issue is that this is a native tool
written in C that is not easy to compile for Windows. This patch
replaces the use of the conf executable with kconfig.py, a script that
uses Kconfiglib to generate the .config and autoconf.h files required to
compile Zephyr.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Carles Cufi f4639f186a scripts: kconfig: Prefer later defaults
This commit mirrors c6390d559f in
Kconfiglib instead of Kconfig.

Origin: https://github.com/carlescufi/Kconfiglib/tree/zephyr

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Carles Cufi 33bbecb946 scripts: kconfig: Add support for wildcards and globbing
Some projects use wildcards when sourcing a Kconfig file. Add
support for globbing the files that match the wildcards and process
them one by one.

Origin: https://github.com/carlescufi/Kconfiglib/tree/zephyr

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Carles Cufi 591eb575ea scripts: kconfig: Import Kconfiglib
Import Kconfiglib, the Python Kconfig parsing library.

Origin: https://github.com/ulfalizer/Kconfiglib
Revision: 8d30e5bb1ad5cab16d1226cc5cd3a03d64664f5d

Note that this will in time replace doc/scripts/genrest/kconfiglib.py,
which is an earlier version and should not live in that folder.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-12 07:29:05 -05:00
Gil Pitney 41cd1435c8 boards: arm: cc3220sf_launchxl: doc: Fixed links, clarifications.
Updated previously broken links to emulation setup install, instructions
and Getting Started Guide.

Also added a few clarifications for the prerequisites setup.

Fixes #5601

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2018-01-11 21:23:09 -05:00
Michael Hope b97e08c2b7 boards: arduino_zero: enable and document the flash driver.
Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-11 19:03:52 -05:00
Michael Hope cd92dd139b flash: add a driver for the internal flash on the SAM0 series.
The SAM0 has a 64 byte page (the programing unit) with 4 pages to a
row (the erase unit).  This driver implements a read/modify/write to
emulate the byte level writes used by NFFS.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-11 19:03:52 -05:00
Alberto Escolar Piedras 5aa0d88b58 native: native_posix doc improvements
* Added a figure explaining how layering of the posix arch
  compares to the embedded builds
* One minor grammar change in last paragraph

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-01-11 19:02:07 -05:00
Erwan Gouriou 164fb32cf6 drivers: entropy: stm32: limit driver to SoC supporting it
In STM32 family, RNG IP is available only on F4 and L4 series.
Besides STM32F401 does not support is neither.
Get entropy driver available on STM32 devices supporting it and
generate a compilation issue on STM32 devices that do not own
the RNG IP.

Solves #5448

Signed-Off-By: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-11 19:00:19 -05:00
Erwan Gouriou 48ff51af75 drivers: entropy: Clock activation is missing on stm32l4
On STM32L4 SoCs RNG is clocked by 48MHz domain.
Hence, besides clock activation, it requires 48M
domain to be enabled.

Tested on:
*nucleo_l476rg
*stm32l476g_disco
*disco_l475_iot1

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-11 19:00:19 -05:00
Florian Vaussard 59f0c99f0e spi: stm32: Correctly apply CPOL and CPHA settings
SPI_MODE_GET() returns a bitfield. It is thus wrong to test if a bit is
set using the equality operator. The bit-wise AND operator must be used
instead.

This can be tested by setting the SPI in mode 3 (CPOL + CPHA). Currently
both tests will fail and the result is a SPI configured in mode 0. This
was confirmed using an oscilloscope. Applying the patch fixes the
polarity.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-01-11 19:00:19 -05:00
Florian Vaussard 5491c29314 i2c: stm32_ll: Fix spurious error while reading using IRQ
We can have a spurious error while performing a transfer using IRQ. This
happens when the last message of the transfer is a read with a STOP
condition. We must disable the RX interrupt while waiting for the STOP
interrupt, otherwise we will get a spurious RX interrupt which will lead
to an error.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-01-11 19:00:19 -05:00
Daniel Wagenknecht 1f66015f73 drivers: serial: use the right clock busses for STM32F0 series UARTs
STM32F0 Series uses different clock busses for UARTs than other
STM32FX Series.

fixes #5406

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2018-01-11 19:00:19 -05:00
Daniel Wagenknecht 47c747e954 drivers: serial: simplify STM32 UART clock initialization
STM32 UART driver uses a macro for clock initialization, that
is difficult to read and incompatible with needed changes to
fix STM32F0 series UART problems.
This change switches to using the full clock bus names in UART
init functions removing the macro-magic and increasing
readability.

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2018-01-11 19:00:19 -05:00
Daniel Wagenknecht 39bb93d402 drivers: stm32 clock control: fix HSI PLLSOURCE with PREDIV1 support
The combination of
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and
CONFIG_CLOCK_STM32_PLL_SRC_HSI
on SOCs with PREDIV1 support made use of the LL define
LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with
PREDIV1 support.

This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI
which is the appropiate source according to stm32f0xx_ll_rcc.h
line 473 and stm32f3xx_ll_rcc.h line 795.

Tested by compiling hello world for nucleo_f091rc board with HSI as
PLLSOURCE.

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2018-01-11 19:00:19 -05:00
Neil Armstrong 5ac18047c1 boards: nucleo_f091rc: add spi to documentation
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 9dfb73c12a pinmux: stm32f0: Add B3/4/5 SPI1 B13/14/15 SPI2 pinmux
Add STM32F0 Pinmuxes for SPI1 and SPI2 controllers to be used on
the nucleo_f091rc board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 7ab0333640 tests: spi_loopback: Enable SPI Loopback test on nucleo_f091rc board
Enable spi_loopback test to work with the nucleo_f091rc board using
the SPI1 controller

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 8359e46d48 boards: nucleo_f091rc: add SPI1 and SPI2 pinmux
Add the SPI1 and SPI2 pinmux for the nucleo_f091rc board

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 5f5480ac7d hal: stm32cube: Fix warning when SPI STM32F0 LL API is compiled
Current implementation of LL_SPI_TransmitData16 on F0 family
generates following warning:
"warning: dereferencing type-punned pointer will break strict-aliasing
rules [-Wstrict-aliasing]"
Besides being forbidden by rule, this cast is not needed, as register is
16 bits wide. Modification has been tested on F0 SoC.
stm32yyxx_ll_spi.h being included in soc.h file, warning is generated
at each compiled object, this commit allows a clean build.
This issue is referenced in ST and tracked under
reference  13359. Code will be updated on upcoming stm32cube updates.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 7caa56f608 spi: spi_ll_stm32: Add support for STM32F0
Add support for STM32F0 similar to STM32F3 and STM32L4

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 9c3f7e11fb arch: arm: soc: stm32f0: include LL spi header
Include the STM32Cube LL SPI Header for STM32F0

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00