drivers: entropy: Clock activation is missing on stm32l4
On STM32L4 SoCs RNG is clocked by 48MHz domain. Hence, besides clock activation, it requires 48M domain to be enabled. Tested on: *nucleo_l476rg *stm32l476g_disco *disco_l475_iot1 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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@ -152,6 +152,29 @@ static int entropy_stm32_rng_init(struct device *dev)
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__ASSERT_NO_MSG(dev_data != NULL);
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__ASSERT_NO_MSG(dev_cfg != NULL);
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#if CONFIG_SOC_SERIES_STM32L4X
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/* Configure PLLSA11 to enable 48M domain */
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LL_RCC_PLLSAI1_ConfigDomain_48M(LL_RCC_PLLSOURCE_MSI,
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LL_RCC_PLLM_DIV_1,
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24, LL_RCC_PLLSAI1Q_DIV_2);
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/* Enable PLLSA1 */
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LL_RCC_PLLSAI1_Enable();
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/* Enable PLLSAI1 output mapped on 48MHz domain clock */
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LL_RCC_PLLSAI1_EnableDomain_48M();
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/* Wait for PLLSA1 ready flag */
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while (LL_RCC_PLLSAI1_IsReady() != 1) {
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}
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/* Write the peripherals independent clock configuration register :
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* choose PLLSAI1 source as the 48 MHz clock is needed for the RNG
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* Linear Feedback Shift Register
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*/
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LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_PLLSAI1);
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#endif /* CONFIG_SOC_SERIES_STM32L4X */
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dev_data->clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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__ASSERT_NO_MSG(dev_data->clock != NULL);
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