Compilers (at least gcc and clang) already provide max value definitions
for basic types. It makes sense to rely on them to properly support
both 32-bit and 64-bit builds.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Cleanup around USB_NRFX_EVT_QUEUE_SIZE option.
Add value range for USB_NRFX_EVT_QUEUE_SIZE to Kconfig.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Use REQTYPE_GET_DIR and REQTYPE_GET_TYPE macros from
USB subsystem instead of specially introduced.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
flash_erase cannot erase a page from the STM32xx SOC flash. It seems
that the erase wait time is not enough and against to what the SOC's
datasheet states. As a result this patch doubles the wait time.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
Check the device state before nrfx_usbd_disable and
nrfx_usbd_uninit. Otherwise it may lead to an ASSERT
inside the HAL driver.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Do not use NRF_USBD_EP_NR_GET in ep_is_valid because
it masks the higher nibble. Although this behavior is valid
to get an index from an endpoint, it is not suitable to check
if the address is incorrect, such as: 0x11.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Forced attempt to set the device address is unpredictable
and also should not be done during testing.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Two sections are needed: bt_l2cap_fixed_chan and bt_l2cap_br_fixed_chan.
However the second one cannot be created using #define as the
preprocessor will expand it to the first before compilation happens,
sending bt_l2cap_br_fixed_chan instances in the wrong section.
This fixes commit 4e8ddfd640 ("Bluetooth: L2CAP: Make use of
Z_STRUCT_SECTION_ITERABLE").
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
We need to increase the stack sizes if user enables CONFIG_COVERAGE
option. You can test this by this command
sanitycheck --coverage -p qemu_x86 -T tests/net/udp \
-T tests/net/mgmt -T tests/net/mld
This is partial fix for issues described in #17323
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Move BUILD_ASSERT to the end of K_MEM_POOL_DEFINE.
K_MEM_POOL_DEFINE can not be processed if
combined with an other macro like __section.
Fixes: #17313
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Check for ZEPHYR_SDK_INSTALL_DIR being invalid instead of
checking for SDK_VERSION being not defined. This change
relates to commit bb09c458c1 ("cmake: Prevent infinite
recursion").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Remove unnecessary MCU slow down to 16Mhz when using BLE chip BlueNRG-MS
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Check if the buffer size is not empty before spi transceive and buffer's
data processing. This fixes the need to slow down MCUs to 16MHz when
using BlueNRG-MS chips.
Tested samples : Beacon, Central, Peripheral
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Provide doc for stm32h747i_disco.
Includes basic description for building and flashing
individual cores.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write
Protecting gpio_configure also protects access to
interrupt_controller IP.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32H7, in Dual core configuration, we restrict configuration
access to CM7 core. CM4 can access to API but not the init part of
the driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for C-M4 core on STM32H7 series.
It is enabled in Dual core context with 2 alternatives boot methods:
* Boot CM4 CM7: Both core boot at reset, then CM4 enters Stop mode.
CM7 performs system configuration then finally wakes up CM4
* Boot CM7, CM4 Gated: Only CM7 boots at reset. Once done with
system configuration it triggers (requires option byte update)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide basic clock control driver for STM32H7.
Bus clock activation is done through CM7 and CM4 common registers
so we don't have to care to the CPU Id before accessing.
Accesses are not protected for now. Only possible configuration
is system clock source set to HSE driven PLL.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If the socket descriptor is invalid (fd < 0), there is no
need to try to close it.
Coverity-CID: 198949
Fixes#16785
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
