Commit graph

41120 commits

Author SHA1 Message Date
Kumar Gala
cc2c64b15e dts/bindings: Fix build issues with bindings
the microchip,mcp2515 and microchip,enc28j60 bindings would hit the
following build error:

device tree error: dts/bindings/can/microchip,mcp2515.yaml (in 'reg'):
'category' from !included file overwritten
('required' replaced with 'optional')

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-13 07:04:46 -05:00
Peter Bigot
189aac1745 boards/efr32mg_sltb004a: use crystal instead of RC oscillator
Selection of the HFRCO causes the SOC to stay at its power-up frequency
of 19 MHz.  Switch to the HFXO to use the configured frequency.

Closes #17630

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-13 07:04:12 -05:00
Ioannis Glaropoulos
a70b824929 doc: Release notes for v2.0 - initial (empty) draft
Get things started for Zephyr 2.0 release notes.
Individual teams will update their appropriate sections.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-08-13 11:57:34 +02:00
Kumar Gala
10ffef93e6 dts/bindings: add docs for enum to binding-template
The 'enum' field was not documented, add some details about it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-12 16:57:38 -05:00
Carles Cufi
a8b208aff7 doc: west: Fix west completion docs
west completion is an extension command, and therefore requires the user
to be in a zephyr installation in order to be available.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-08-12 09:44:37 -07:00
Armando Visconti
757366c18c dts: stm32l4r5: (FIX) Provide clock info for spi3 controller
SPI3 clock info were missing and following macros were
not generated:

 - DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BITS
 - DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BUS

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-08-12 10:45:14 -05:00
Kumar Gala
b2ba44c1d7 scripts/dts/gen_defines.py: Fix generation for multiple PWMs
If there is more than one PWM than generate a define with a trailing
index for the PWM.  This matches what we do for GPIOs.

So something like:
  DT_PWM_LEDS_RED_PWM_LED_PWMS_CONTROLLER_0
  DT_PWM_LEDS_RED_PWM_LED_PWMS_CONTROLLER_1
  ...
  DT_PWM_LEDS_RED_PWM_LED_PWMS_CONTROLLER_<N>

Fixes #18171

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-12 17:42:15 +02:00
Andrzej Puzdrowski
4ea3c9560a settings: align nvs read_callback return value
The callback might return more than length of data read.
It should return nothing more than read length requested.

Patch fixes this behavior.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-08-12 15:25:17 +02:00
Andrzej Puzdrowski
1ae2b9eff9 doc/settings: doxygen for settings read callback method
The callback typedef was not documented. This documentation
which explains what behavior is expected from any implementation.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-08-12 15:25:17 +02:00
Alberto Escolar Piedras
66f8075bc6 native_posix: Move include out of extern "C" block
Related to #17997, move an include out of a extern "C" block

Background:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-08-12 15:10:15 +02:00
Alberto Escolar Piedras
18ea3bfa80 nrf52_bsim: Add missing header guard and extern C block
Add a missing header guard and an extern "C" block
in one of the nrf52_bsim headers

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-08-12 15:10:15 +02:00
Alberto Escolar Piedras
fce0316687 POSIX arch: Fixe issues related to extern "C"
Related to #17997, for the POSIX arch:
* Remove some unnecessary extern "C" and ifdef blocks
* Move an include out of one of these blocks
* Add a missing extern "C" block

Background:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-08-12 15:10:15 +02:00
Marcin Sloniewski
b78bf8d6c1 requirements.txt: change package name "hub" to "git-spindle"
Package "hub" has been renamed some time ago to "git-spindle".
Recently package with the same name "hub" has been released on PyPi
page, which causes installing pip requirements.txt to fail since
it is trying to install different package.

Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
2019-08-12 11:53:10 +02:00
Ioannis Glaropoulos
4524035bc8 release: Zephyr 2.0.0-rc1
Bump to 2.0.0-rc1.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-08-11 23:10:59 +02:00
Wayne Ren
13cf5c227f boards: nsim: disable CONFIG_SMP by default for nsim_hs_smp
* CONFIG_SMP can be enabled by smp application, e.g. tests/kernel/smp
* if application is not designed for smp, CONFIG_SMP can be disabled,
and the target works as a single processor.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Wayne Ren
c78be56f0f tests: enable hsdk and nsim_hs_smp for smp test
ARC now supports SMP, enable the kernel/smp test
for arc platforms

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Wayne Ren
36a56e7a8f arch: arc: fix a bug when CONFIG_SMP is enabled
the bug is forgot to fixes, when CONFIG_SMP is enabled,
it will cause build error

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Alexey Brodkin
408433d5c7 board/nsim: Add support of multi-core ARC HS platform in nSIM
Now when SMP support for ARC is available we may introduce a simulation
platform which might be used for testing & development for SMP setups.

One important note is stand-alone nSIM (as well as its "Free" flavour)
doesn't support SMP simulation so we have to switch to use of nSIM via
proprietary MetaWare debugger [1] and so:
 1. We introduce new emulation target "mdb"
 2. It's only possible to run that platform for those who
    have MetaWare tools installed and valid license.

Though QEMU port for ARC is in work at the moment and once we
open that port and it has SMP support we'll switch to it and everybody
will be able to try ARC HS with SMP.

[1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-08-11 21:18:38 +02:00
Vinayak Kariappa Chettimada
3e0e378dca Bluetooth: controller: split: Fix pipeline for continuous events
Fix the pipeline prepare-resume implementation to correctly
handle multiple continuous events that request resume on
being pre-empted.

Symptoms of the bug being, when having continuous scanning,
and an active peripheral if a directed advertising is
started the peripheral event are not scheduled causing link
supervision timeout.

This is fixed by not having an enqueued resume event
prepared if there is an enqueued new non-resume event in the
pipeline.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-08-11 16:42:52 +02:00
Vinayak Kariappa Chettimada
d90f3db3bc Bluetooth: controller: split: Increase pipeline size
Increase pipeline size to accommodate probable multiple
prepare for directed advertising events, with reserved time
which are shorter than prepare duration, being enqueued.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-08-11 16:42:52 +02:00
Vinayak Kariappa Chettimada
e4ae7b8818 Bluetooth: controller: split: Increase event start overhead time
Increase the event start overhead time to accommodate for
processing time for dequeueing pipeline in Upper Link Layer.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-08-11 16:42:52 +02:00
Vinayak Kariappa Chettimada
f6799ff57e Bluetooth: controller: split: Reduce event done queue size
Reduce the maximum number of pending event done elements by
decoupling it from the maximum pipeline elements.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-08-11 16:42:52 +02:00
Vinayak Kariappa Chettimada
e8b776a9b0 Bluetooth: mesh_shell: Disable controller filter
Disable controller filtering feature not used on mesh stack.
This reduces some RAM usage.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-08-11 16:42:52 +02:00
Wayne Ren
a97053d5eb arch: arc: no need of default n for arc_connect
as suggested in comments of PR #17747, no need of default n
for arc_connect

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 20:11:29 +02:00
Wayne Ren
dbc29fe77e boards: hsdk: add initial support of ARC HS Development Kit
This commit includes the initial support of ARC HS Development Kit:
* hsdk soc support
* hsdk board support
* no mmu support, so no userspace
* smp support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 20:11:29 +02:00
Wayne Ren
4fb8bf61c0 drivers: ns16550: add WORD only access support
In some hardware,e.g. ARC HS Development kit,the
peripheral space of ns16550 only allowes WORD
access,  byte acess will raise bus error.

This commit adds support for this case

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 20:11:29 +02:00
Wayne Ren
5a0acd5105 samples: add sample to show how ARC TEE works
* this is a simple sample to show how
 secure applicaiton and non-secure application work
 together. More details are in README.rst

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Wayne Ren
1e2d42273e boards: nsim: add initial support of normal/non-secure application
normal/non-secure application: nsim_sem_normal

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Wayne Ren
5bb1f4f230 boards: emsk: add initial support of normal/non-secure application
* Non-secure/normal application: em_starterkit_em7d_normal
* secure application: em_starterkit_em7d

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Wayne Ren
cca39204c2 arch: arc: add initial support of ARC TEE
* it's based on ARC SecureShield
* add basic secure service in arch/arc/core/secureshield
* necesssary changes in arch level
   * thread switch
   * irq/exception handling
   * initialization
* add secure time support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Michael Scott
ee92cf4d68 drivers: modem: ublox-sara-r4: Support SARA-U2 modems, sense VINT
This adds support for SARA-U2 modems. They have different timings on
the PWR_ON pin, don't support AT+CESQ and require a manual GPRS
connection setup.

The VINT pin is used as a more reliable and faster way to power on the
modem.

Based on work by Göran Weinholt <goran.weinholt@endian.se>

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Michael Scott
ebf6520d87 drivers: modem: ublox SARA convert to modem context
Let's convert the SARA modem to use the more generic modem context
layers so that we don't maintain a lot of what should be shared code.

This conversion includes:
- modem context as the helper umbrella
- uart modem interface layer
- generic command handler layer
- modem socket helper
- move from net_context offload API to socket offload API

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Michael Scott
f5c45c2946 drivers: modem: introduce socket helper layer
Many modems implement socket-based APIs to manage data connections.
This layer provides much of the groundwork for keeping track of
these "sockets" throughout their lifecycle (from the initial offload
API calls through the command handler call back layers):
- structure for holding socket data like IP protocol, destination,
  source and incoming packet sizes
- configuration to note modem starting socket id and number of
  sockets
- methods to get/put socket structs from/to the pool
- function to update the # and size of packets in the modem receive
  queue
- prebuilt modem_socket_poll() method for socket offload poll() API

Example modem driver setup code looks like this:

/* socket data */
static struct modem_socket_config socket_config;
static struct modem_socket sockets[MDM_MAX_SOCKETS];

static int modem_init(struct device *dev)
{
  ...
  /* setup socket config */
  socket_config.sockets = &sockets[0];
  socket_config.sockets_len = ARRAY_SIZE(sockets);
  socket_config.base_socket_num = 0;
  ret = modem_socket_init(&socket_config);
  ...
}

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Michael Scott
02abddccd6 drivers: modem: cmd handler: introduce cmd handler driver layer
This is a generic command handler implementation which uses the
supplied modem interface to process incoming data and hand it
back to the modem driver via callbacks defined for:
- modem responses
- unsolicited messages
- specified handlers for current operation

The individual modem drivers define functions as command handlers
via the MODEM_CMD_DEFINE() macro.

To use these handlers, a modem operation defines a series of
modem_cmd structures and passes them to the modem_cmd_send()
function.  The modem_cmd includes data for:
- a matching string for when to execute the handler
- # of parameters to parse after the matching string
- delimeters for the parameters

Example modem driver setup code looks like this:

/* create modem context object */
static struct modem_context mctx;

/* net_buf receive pool */
NET_BUF_POOL_DEFINE(mdm_recv_pool, MDM_RECV_MAX_BUF,
		    MDM_RECV_BUF_SIZE, 0, NULL);

/* modem cmds */
static struct modem_cmd_handler_data cmd_handler_data;
static u8_t cmd_read_buf[MDM_RECV_BUF_SIZE];
static u8_t cmd_match_buf[MDM_RECV_BUF_SIZE];

/* modem response handlers */
static struct modem_cmd response_cmds[] = {
	MODEM_CMD("OK", on_cmd_ok, 0U, ""),
	MODEM_CMD("ERROR", on_cmd_error, 0U, ""),
	MODEM_CMD("+CME ERROR: ", on_cmd_exterror, 1U, ""),
};

/* unsolicited handlers */
static struct modem_cmd unsol_cmds[] = {
	MODEM_CMD("+UUSOCL: ", on_cmd_socknotifyclose, 1U, ""),
	MODEM_CMD("+UUSORD: ", on_cmd_socknotifydata, 2U, ","),
	MODEM_CMD("+UUSORF: ", on_cmd_socknotifydata, 2U, ","),
	MODEM_CMD("+CREG: ", on_cmd_socknotifycreg, 1U, ""),
};

/* setup cmd handler data */
cmd_handler_data.cmds[CMD_RESP] = response_cmds;
cmd_handler_data.cmds_len[CMD_RESP] = ARRAY_SIZE(response_cmds);
cmd_handler_data.cmds[CMD_UNSOL] = unsol_cmds;
cmd_handler_data.cmds_len[CMD_UNSOL] = ARRAY_SIZE(unsol_cmds);
cmd_handler_data.read_buf = &cmd_read_buf[0];
cmd_handler_data.read_buf_len = sizeof(cmd_read_buf);
cmd_handler_data.match_buf = &cmd_match_buf[0];
cmd_handler_data.match_buf_len = sizeof(cmd_match_buf);
cmd_handler_data.buf_pool = &mdm_recv_pool;
cmd_handler_data.alloc_timeout = BUF_ALLOC_TIMEOUT;
ret = modem_cmd_handler_init(&mctx.cmd_handler, &cmd_handler_data);

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Michael Scott
d56a05f7a7 drivers: modem: interface: introduce UART interface driver layer
The UART-based modem interface layer implements the modem context
interface for Zephyr's UART APIs.  This driver closely resembles
the existing modem receiver, but conforming to the modem interface
agreements.

Example modem driver setup code looks like this:

/* create modem context object */
static struct modem_context mctx;

/* create uart interface data object and buffers */
static struct modem_iface_uart_data iface_data;
static u8_t iface_isr_buf[MDM_RECV_BUF_SIZE];
static u8_t iface_rb_buf[MDM_MAX_DATA_LENGTH];

iface_data.isr_buf = &iface_isr_buf[0];
iface_data.isr_buf_len = sizeof(iface_isr_buf);
iface_data.rx_rb_buf = &iface_rb_buf[0];
iface_data.rx_rb_buf_len = sizeof(iface_rb_buf);
ret = modem_iface_uart_init(&mctx.iface, &iface_data,
			    UART_DEV_NAME);

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Michael Scott
90e778d983 drivers: modem: context helper: introduce modem context helper driver
Initial support for modems in Zephyr use the following driver model:
- Main portions of code live in the modem specific driver.
  This includes internal socket management, command parsing, etc.
- They leverage a UART-based modem receiver helper to gather data.
- Interface with Zephyr networking via net_context offload APIs.

This implementation was good enough to kick start interest in
supporting modem usage in Zephyr, but lacks future scalability:
- The net_context offload APIs don't allow for operations such
  as offloaded DNS, SSL/TLS and other HW specific features.
- Since most of the code lives within the modem drivers, it's
  very hard for the Zephyr community to improve the driver layer
  over time.  Bugs found in 1 driver probably affect others due
  to copy/paste method of development.
- Lack of abstraction for different modem interfaces and command
  handlers makes it impossible to write a "dummy" layer which
  could be used for testing.
- Lack of centralized processing makes implementing low power modes
  and other advanced topics more difficult.

Introducing the modem context helper driver and sub-layers:
- modem context helper acts as an umbrella for several configurable
  layers and exposes this data to externals such as the modem shell.
  Included in the helper is GPIO pin config functions which are
  currently duplicated in most drivers.
- modem interface layer: this layer sits on the HW APIs for the
  peripheral which communicates with the modem.  Users of the modem
  interface can handle data via read/write functions.  Individual
  modem drivers can select from (potentially) several modem
  interfaces.
- modem command parser layer: this layer communicates with the
  modem interface and processes the data for use by modem drivers.

Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/17922

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-10 00:03:39 +02:00
Bradley Bolen
b602e38396 cmake: emu: Allow overriding the qemu binary
The xlnx-zcu102 qemu machine is the only one that supports a Cortex-R
processor.  However, its main CPUs are Cortex A53s which requires the
aarch64 qemu binary to run.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
6dd94127ca boards: qemu_cortex_r5: Add qemu test board for the Cortex-R series
This adds a qemu test board using the Xilinx ZynqMP SoC.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
929dc717cf soc: arm: xilinx_zynqmp: Add qemu based SoC
This commit adds support for the Zynq UltraScale+ MPSoC as a qemu based
platform for Cortex-R based testing.  This SoC only supports an
interrupt controller and serial port for limited testing.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Wendy Liang
4ef9d4b6bf timer: Add Xilinx ZynqMP PS ttc timer
Add Xilinx PS ttc timer for Xilinx ZynqMP platform.

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2019-08-09 22:50:50 +02:00
Wendy Liang
5364a389e5 serial: Add Xilinx ZynqMP PS uart driver
Add ZynqMP PS uart driver for Xilinx ZynqMP platform

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
8080a84887 arch: arm: Add Cortex-R5 support
Pass the correct -mcpu flags to the compiler when building for the
Cortex-R5.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
e439cfdf38 arch: arm: Add Cortex-R4 support
Pass the correct -march and -mcpu flags to the compiler when building
for the Cortex-R4.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
eb9515ab9c arch: arm: cortex_r: Add memory barriers for register accesses
Cortex R has a write buffer that can cause reordering problems when
accessing memory mapped registers.  Use memory barries to make sure that
these accesses are performed in the desired order.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
c30a71df95 arch: arm: Add Cortex-R support
This adds initial Cortex-R support for interrupts and context switching.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
7daf42b123 Revert "toolchain: gcc: Remove ref. to undefined sym. CONFIG_ISA_ARM"
This reverts commit e20fd5f454.

This is needed for Cortex-R support.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
571d3b54db interrupt_controller: gic: Add support for the GIC400
The GIC400 is a common interrupt controller that can be used with the
Cortex A and R series processors.  This patch adds basic interrupt
handling for the GIC, but does not handle multiple routing or
priorities.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
b34b00d6ec drivers: interrupts: Add a set_priority callback
Provide a path for irq controller drivers to change properties of an
individual irq using priority and flags fields that come from the device
tree.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Michael Scott
07f9e8beea net: lwm2m: fix IP address max calc in conn mon obj
When checking for total IP address counts, don't check
CONFIG_NET_IF_MAX_IPV6_COUNT twice.  This was a typo for
CONFIG_NET_IF_MAX_IPV4_COUNT.

This was reported by IRC user: retfie

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-09 23:22:13 +03:00
Kumar Gala
226b3381f9 dts: nxp: cleanup remove system-clock-frequency
Remove unused "system-clock-frequency" property, we don't have this
defined in various bindings and thus aren't using it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 14:56:20 -05:00