Commit graph

41120 commits

Author SHA1 Message Date
Charles E. Youse
6244676a51 arch/x86: refactor z_do_read_cpu_timestamp32()
This function, like its cousin z_tsc_read(), can be shared between
subarches. Note: it's unclear to me if we actually need these to be
two separate functions (do we need serialization?) or if they can
be combined into one function. Add that to the to-do list.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
3cf1bff71c arch/x86: complete 64-bit linker script
The previous linker script was barebones and non-standard. It is
replaced with a script conforms to the rest of the Zephyr arches,
utilizing include/linker headers and standard macros.

link-tool-gcc.h is updated to account for the "i386:x86-64" arch and
the generation of 64-bit ELF binaries.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
2bb59fc84e arch/x86: add nested interrupt support to Intel64
Add support for multiple IRQ stacks and interrupt nesting.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
cdb9ac3895 arch/x86: Add exception reporting code for Intel64
Fleshed out z_arch_esf_t and added code to build this frame when
exceptions occur. Created a separate small stack for exceptions and
shifted the initialization code to use this instead of the IRQ stack.

Moved IRQ stack(s) to irq.c.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
a10f2601cc arch/x86: add IRQ offloading to Intel64 subarch
The IRQ_OFFLOAD_VECTOR config option is also moved to the arch level,
as it is shared between both 32- and 64-bit subarches.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
0e0199387a arch/x86: set default stack sizes
Using the arch Kconfig here, instead of kernel/Kconfig. Intel64 with
the SysV ABI requires some pretty big stacks. These 4K-8K defaults
are arguably a bit small, but the Zephyr defaults are REALLY too small.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
4ddaa59a89 arch/x86: initial Intel64 support
First "complete" version of Intel64 support for x86. Compilation of
apps for supported boards (read: up_squared) with CONFIG_X86_LONGMODE=y
is now working. Booting, device drivers, interrupts, scheduling, etc.
appear to be functioning properly. Beware that this is ALHPA quality,
not ready for production use, but the port has advanced far enough that
it's time to start working through the test suite and samples, fleshing
out any missing features, and squashing bugs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
9b00f7821a arch/x86: rework z_arch_irq_lock() and z_arch_irq_unlock()
Simplified these two inline functions somewhat, and refactored them:
unlocking can be shared between subarches, but locking cannot.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
58bbbddbef arch/x86: fix multiboot.c pointer cast
Widen the integer to pointer size before conversion, to make
explicit the intent (and silence the compiler warning). Also
fix a minor bug involving a duplicate (and thus dead) store.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
8b339e7409 arch/x86: share implementations of sys_io primitives
The sys_inXX() and sys_read/writeXX() I/O primitives can be shared
between subarches of x86 with minor modifications, so move them.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
34307a54f0 arch/x86: initial Intel64 bootstrap framework
This patch adds basic build infrastructure, definitions, a linker
script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit
ELF binary suitable for use with GRUB to minimally bootstrap an
Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly
be called a Zephyr kernel as it is lacking most of the glue logic,
but it is a starting point to flesh those out in the x86 tree.

The "kernel" builds with a few harmless warnings, both with GCC from
the Zephyr SDK and with ICC (which is currently being worked on in
a separate branch). These warnings are either related to pointer size
differences (since this is an LP64 build) and/or dummy functions
that will be replaced with working versions shortly.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
c58b28ab0a arch/x86: add placeholders for Intel64 headers
Use different headers for kernel_arch_{func,thread}.h when in
CONFIG_X86_LONGMODE, and add placeholders for Intel64 versions.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
5e10d590c6 arch/x86: refactor kernel_arch_data.h
Some definitions may be shared between subarchitectures, so refactor
accordingly. The definitions are also modified to separate bits. A
placeholder is created for the Intel64 definitions.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
faac79f203 arch/x86: add register definitions to msr.h
Add definitions for the EFER MSR.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
773cdf1c55 arch/x86: refactor arch.h
Some of the elements of arch.h can be shared between subarches,
so put them in a common file and factor out the rest. Placeholder
left for the Intel64 definitions to be added later.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
c18f028366 arch/x86: refactor offsets.c
The IA32 and Intel64 subarchitectures will generate different offset
symbols, so they are refactored. No functional change.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
d25ef6ed44 arch/x86/pcie: use Z_IRQ_TO_INTERRUPT_VECTOR() macro
The _irq_to_interrupt_vector[] array shouldn't be accessed directly,
as there is a macro for this.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
b40cbc8fb4 cmake: select appropriate Zephyr SDK compiler for CONFIG_X86_LONGMODE
We need to use the new x86_64 chain provided by the SDK in long mode.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
239ceb4c5b soc/x86/apollo_lake: architecture is goldmont
Update the -march flag passed to the compiler to reflect the
underlying microarchitecture is 'goldmont'.

Fixes: #17104

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
6cf904cc0d arch/x86: rename X64 references to Intel64
Intel's X86-64 implementation is officially "Intel64", so follow suit.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Andrew Boie
714e37fb78 doc: add more details about memory domains
We now more throroughly discuss memory domains, thread
resource pools, and automatic memory domains.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-15 07:08:05 +08:00
Nicolas Pitre
70c4aa4293 sys_sem: straighten build time definition macros
Commit db48d3e22a ("sys_sem: add build time definition macros")
recently introduced SYS_SEM_DEFINE() and defined it in terms of
Z_DECL_ALIGN() and __in_section() to force the _k_sem linker section.

It is however cleaner and less obscur to use Z_STRUCT_SECTION_ITERABLE()
and list the _sys_sem linker section alongside the _k_sem one.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-09-14 22:14:51 +08:00
Piotr Mienkowski
844d5b403c boards: provide default SWO freq for efr32_slwstk6061a
The commit provides default SWO frequency value for efr32_slwstk6061a
board. The SWO frequency is limited by board hardware to 875 kHz.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-14 07:35:23 -05:00
Kumar Gala
29e55d74e8 rtc: Remove old rtc functionality
Remove the old rtc functionality as its been deprecated for 2 releases
now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-14 07:33:38 -05:00
Ulf Magnusson
a0136b9850 gen_syscalls.py: Remove semicolons, unused variables, and a '!= None'
Fix new pylint warnings:

    scripts/gen_syscalls.py:195:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:249:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:251:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:253:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:264:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:265:0: W0301: Unnecessary semicolon
    (unnecessary-semicolon)

    scripts/gen_syscalls.py:152:8: W0612: Unused variable 'i'
    (unused-variable)

    scripts/gen_syscalls.py:231:18: W0612: Unused variable 'argname'
    (unused-variable)

    scripts/gen_syscalls.py:344:7: C0121: Comparison to None should be
    'expr is not None' (singleton-comparison)

None is a global object, so 'is' (which is like a pointer comparison) is
cleaner, and more idiomatic Python.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-14 13:36:41 +08:00
Ulf Magnusson
d8accb55d1 scripts: footprint: Fix pylint warnings
- Remove unused variables and an unused 'sys' import

 - Simplify 'if len(foo) != 0' to 'if foo'. Non-empty lists/dicts/etc.
   are truthy in Python.

 - Use a raw string to fix this warning:

       scripts/footprint/size_report:270:0: W1401: Anomalous backslash
       in string: '\.'. String constant might be missing an r prefix.
       (anomalous-backslash-in-string)

   The issue is that '\.' just happens to work due to not being
   recognized as an escape sequence.

   Escape sequences are not interpreted in raw strings, so they're safer
   for regexes.

 - Replace 'is 0' with '== 0'. 'is' is for testing object identity, and
   0 isn't guaranteed to be a unique object (but always is in practice).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-14 13:35:08 +08:00
Tomasz Bursztyka
403e6f1b99 soc/arm: Add a fixup for counter/alarm sample to compile with MEC1501
There are 2 other timers that could be selected, let's just take the
first 32bits one. This should be sufficient to verify the driver.

Enabling the timer in relevant board's dts file as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-14 12:13:49 +08:00
Tomasz Bursztyka
c6fe94a6f1 soc/arm: Enable XEC counter driver relevantly for MEC1501
Enabling XEC counter driver when CONFIG_COUNTER is set.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-14 12:13:49 +08:00
Tomasz Bursztyka
41c93a589c driver/counter: Add support for Microchip's XEC basic timer devices
Such basic timer is found on MEC150x for instance.
Since instances have dedicated data, let's define specifice instance
based on unique DT base address definition.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-14 12:13:49 +08:00
Tomasz Bursztyka
5a09a51e31 dts/arm: Add the 3 MEC1501 basic timer instances.
4 are found: 2 with a counter of 16bits and 2 with a counter of 32 bits.
However, first 32bits instance will not be exposed as it will be used by
rtos timer driver directly to implement k_busy_wait()

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-14 12:13:49 +08:00
Tomasz Bursztyka
0c8f9e3284 dts/bindings: Adding Microchip's XEC basic timer
4 instance are for instance found on the MEC150x.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-14 12:13:49 +08:00
Kumar Gala
c481f8e2e4 modules: Update ci-tools to latest for status check report
The latest ci-tools reports the shippable job number in the status
check.  This is useful if we have an error or something to be able
to find the logs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 19:19:41 -05:00
Maureen Helm
f646f8d0cf soc: nxp_kinetis: Refactor flash configuration field to a common place
Refactors the kinetis flash configuration field so it can be shared
across all kinetis SoCs. Defaults are overridden for the k8x and ke1xf
series to preserve values used prior to this refactoring.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-09-13 13:58:46 -05:00
Maureen Helm
2bc700f66e soc: nxp_kinetis: Make kinetis flash configuration field configurable
Kinetis SoCs have a 16-byte flash configuration field that must be
loaded at a specific address in flash. This field is not needed if we
are building an image to be chainloaded by MCUboot or a RAM-only image,
so we can exlude it in these cases and recover some wasted flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-09-13 13:58:46 -05:00
Kumar Gala
1baf2f3e6f kconfig: Mark dt_{int,hex,str}_val as deprecated
As we work on removing the .conf file that is generated by the dt
scripts, mark dt_{int,hex,str}_val functions as deprecated.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
038d2b272d kconfig: counter: nrfx: Convert to use new kconfigfunctions
Convert use of dt_int_val to dt_node_has_bool_prop.  As we want to
remove dt_int_val.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
8a50048b2b kconfig: serial: sam0: Convert to use new kconfigfunctions
Convert use of dt_int_val to dt_compat_enabled.  As we want to
remove dt_int_val.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
54f81a670b kconfig: hifive1_revb: Convert to use new kconfigfunctions
Convert use of dt_hex_val to dt_node_reg_addr.  As we want to
remove dt_hex_val.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
2632647ea0 kconfig: nxp_imx: rt: Convert to use new kconfigfunctions
Convert use of dt_int_val/dt_hex_val to dt_node_reg_{addr,size}.  As
we want to remove dt_int_val/dt_hex_val.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
8ce0cf0126 kconfig: Convert device tree chosen properties to new kconfigfunctions
Convert how we get the various chosen properties like "zephyr,console"
to use the new kconfig functions like dt_chosen_to_label.

Because of how kconfig parses things we define a set of variables of the
form DT_CHOSEN_Z_<PROP> since comma's are parsed as field seperators in
macros.

This conversion allows us to remove code in gen_defines.py for the
following chosen properties:

zephyr,console
zephyr,shell-uart
zephyr,bt-uart
zephyr,uart-pipe
zephyr,bt-mon-uart
zephyr,uart-mcumgr
zephyr,bt-c2h-uart

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
5735397b9b kconfig: Add new functions to kconfigfunctions to use EDT
Add a new set of functions that utilize EDT so we can move away from the
generated .conf file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Kumar Gala
69ba9dafcb tests/subsys/settings/fcb: Fix ifdef in ztest_test_suite
We don't allow an ifdef in ztest_test_suite because its a macro.  We
usually handle this by defining multiple blocks and ifdef around them.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 10:27:49 -05:00
Kumar Gala
2cad8d20ee ci: updates to fix pylint commit test
Update to CI image 0.9.1 to have pylint installed.  Bump ci-tools sha
that re-enables running the pylint test.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 10:00:16 -05:00
Alexander Wachter
ec0e199206 drivers: can: mcux: Persuade the driver to send in chronological order
The mcux CAN controller uses frame ID and position to calculate the
priority, but the driver expects chronological ordering.
This PR mimics this behavior by only using the last free message box.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-09-13 09:58:11 -05:00
Saravanan Sekar
1aa696bc2b wifi: eswifi: Implement TCP/UDP socket offload with TLS
Newly implement socket based communication on eswifi mainly to
achive TLS. Tested with Inventek ISM43362-M3G-L44.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2019-09-13 16:54:57 +03:00
Jukka Rissanen
207943c2a7 net: pkt: Clone cursor position in net_pkt_clone()
We need to make sure that net_pkt_clone() sets cursor correctly.
This cursor position is needed so that we can skip IP header
for incoming packet properly. Not all applications need to know
the cursor position of the cloned packet. Unfortunately we cannot
know that in advance so just set the cursor to correct position in
the cloned packet.

Fixes #19135

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-09-13 16:30:02 +03:00
Jan Van Winkel
1b5e6072ca headers: Removed include other.h from toolchain.h
Removed include of non existing header toolchain/other.h from
toolchain.h

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-13 11:14:56 +02:00
Scott Worley
6be78f36df soc : arm : microchip_mec Move custom busy wait config to MEC1501 SoC
Configuration item custom busy wait is required for all MEC1501
series if its RTOS timer driver is enabled. We moved the selection
of the timer from board level to MEC1501 SoC level.
Frequency selection remains at the board level.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-09-13 09:55:59 +02:00
Jukka Rissanen
8e6aaaf919 tests: net: socket: Test that non-blocking accept() works
Mark socket non-blocking and make sure that accept() will return
immediately.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-09-13 10:41:33 +03:00
Jukka Rissanen
0b1034aee2 net: socket: Support non-blocking accept()
If socket is marked non-blocking, then accept() will return immediately
if there is no one connecting.

Fixes #19103

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-09-13 10:41:33 +03:00