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arch/x86: refactor kernel_arch_data.h

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Some definitions may be shared between subarchitectures, so refactor
accordingly. The definitions are also modified to separate bits. A
placeholder is created for the Intel64 definitions.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse 2019-07-04 12:10:49 -07:00 • committed by Andrew Boie
commit 5e10d590c6
3 changed files with 27 additions and 12 deletions
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11
arch/x86/include/ia32/kernel_arch_data.h
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@ -68,17 +68,6 @@
#define _FP_USER_MASK (K_FP_REGS)
#endif
/*
* EFLAGS value to utilize for the initial context: IF=1.
*/
#define EFLAGS_INITIAL 0x00000200U
/* Enable paging and write protection */
#define CR0_PG_WP_ENABLE 0x80010000
/* Set the 5th bit in CR4 */
#define CR4_PAE_ENABLE 0x00000020
#ifndef _ASMLANGUAGE
#include <sys/util.h>

9
arch/x86/include/intel64/kernel_arch_data.h Normal file
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@ -0,0 +1,9 @@
/*
* Copyright (c) 2019 Intel Corp.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_DATA_H_
#define ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_DATA_H_
#endif /* ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_DATA_H_ */

19
arch/x86/include/kernel_arch_data.h
View file

@ -33,7 +33,24 @@
#define IV_SIMD_FP 19
#define IV_INTEL_RESERVED_END 31
#ifndef CONFIG_X86_LONGMODE
/*
* EFLAGS/RFLAGS definitions. (RFLAGS is just zero-extended EFLAGS.)
*/
#define EFLAGS_IF 0x00000200U /* interrupts enabled */
#define EFLAGS_INITIAL (EFLAGS_IF)
/*
* Control register definitions.
*/
#define CR0_PG 0x80000000 /* enable paging */
#define CR0_WP 0x00010000 /* honor W bit even when supervisor */
#define CR4_PAE 0x00000020 /* enable PAE */
#ifdef CONFIG_X86_LONGMODE
#include <intel64/kernel_arch_data.h>
#else
#include <ia32/kernel_arch_data.h>
#endif