No need to store/reset/recompute the chksums, only compute it again and
if it's not 0: drop the packet.
RFC 1071:
"To check a checksum, the 1's complement sum is computed over the
same set of octets, including the checksum field. If the result
is all 1 bits (-0 in 1's complement arithmetic), the check succeeds."
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
IPv4, ICMPv4/6, UDP, TCP: all checksums are meant to be one's complement
on a calculated sum. Thus return one's complement already from the right
place instead of applying it in each and every place where
net_calc_chksum is called.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removed kconfig option for setting shell thread priority and fix
it to K_LOWEST_APPLICATION_THREAD_PRIO.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
With python3.7 we get the following warning:
extract_dts_includes.py:496: DeprecationWarning: Using or
importing the ABCs from 'collections' instead of from
'collections.abc' is deprecated, and in 3.8 it will stop
working.
Fix this by using 'from collections.abc import Mapping' instead of
'import collections'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
RISC-V permits myriad extensions to the ISA, any of which may imply
additional context that must be saved and restored on ISR entry and
exit. The current in-tree example is the Pulpino core, which has extra
registers used by ISA extensions for running loops that shouldn't get
clobbered by an ISR.
This is currently supported by including pulpino-specific definitions
in the generic architecture code. This works, but it's a bit inelegant
and is something of a layering violation. A more generic mechanism is
required to support other RISC-V SoCs with similar requirements
without cluttering the arch code too much.
Provide that by extending the semantics of the existing
CONFIG_RISCV_SOC_CONTEXT_SAVE option to allow other SoCs to allocate
space for saving and restoring their own state, promoting the
currently pulpino-specific __soc_save_context / __soc_restore_context
routines to a RISC-V arch API.
The cost of making this generic is two more instructions in each ISR
to pass the SoC specific context to these routines in a0 rather than
just assuming the stack points to the right place. This is minimal,
and should have been done anyway to keep with the ABI.
As a first (and currently only in-tree) customer, convert the Pulpino
SoC code to this new mechanism.
Signed-off-by: Marti Bolivar <marti@foundries.io>
The way that CONFIG_EXECUTION_BENCHMARKING=y is handled on this
architecture is incorrect. The goals are:
- call read_timer_start_of_isr() as close as possible to the
beginning of the ISR
- call read_timer_end_of_isr() after all preparations have
been made to call the driver-level IRQ handler, but it hasn't
been called yet
The current implementation could cause kernel crashes, though.
The read_timer_start_of_isr() call is made before saving MEPC or any
SoC-specific context. The MEPC issue is not that big of a deal, but
doing it before saving SoC context could clobber state that hasn't
been saved yet and corrupt the kernel.
One example is a pulpino style RISC-V SoC. Some Pulpino cores have
extra registers that are used for ISA extensions used to generate code
for C loops. There's no guarantee read_timer_start_of_isr() will never
have a loop inside: in fact, the RISC-V User-Level ISA v2.2 explicitly
recommends using a loop to get the 64-bit value of the "cycle" CSR. A
Pulpino-like SoC with a cycle CSR could thus naturally have a
read_timer_start_of_isr() implementation that involves loops. Saving
the loop state before reading the timer would then be needed.
Fix this issue by moving the call to read_timer_start_of_isr to after
all context saving is done. (This is a fairer comparison to Arm
Cortex-M SoCs anyway, since register stacking is performed in hardware
on Cortex M and is done before the first ISR instruction executes.)
The call to read_timer_end_of_isr() has an issue as well: it's called
after the ISR's argument has been stored in a0 and the ISR address is
in t1, but before actually calling the ISR itself.
In the standard RV32I calling convention, both t1 and a0 are caller
saved, so read_timer_end_of_isr() is within its rights to set them to
any garbage, which we'll happily treat as a function and its argument
and execute.
Avoid that possibility by saving the register values to the stack in
this configuration.
Signed-off-by: Marti Bolivar <marti@foundries.io>
The generated stub doesn't actually initialize the CPU or jump to
__start. All it does is set up the interrupt stack and jump to
_PrepC. Fix the help.
Signed-off-by: Marti Bolivar <marti@foundries.io>
If CONFIG_PRINTK=n, cause_str will not be defined, and _Fault() will
fail to build. Fix that by ifdeffing out the printk call in that case.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Add a Coccinelle script that adds an 'U' to values assigned to
unsigned variables, according ot MISRA-C rule 7.2.
Add a 'report' mode to the script that can be used by developer/CI
and a 'patch' mode that should do the heavy lifting.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Some toolchains are built with multilib enabled in order to provide
multiple versions of the same library, optimized for different ABI
or architecture. They require the the ABI/architecture/CPU selection
options to be passed at linked time. This is important for example
when linking with newlib.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Some toolchains are built with multilib enabled in order to provide
multiple versions of the same library, optimized for different ABI
or architecture. They require the -march= and -mabi= options to be
passed at link time. This is important for example when linking with
newlib.
We do that by passing zephyr_ld_options the same arguments than
zephyr_compile_options. The -mabi option is passed directly while the
-march option, if defined, is passed through ${ARCH_FLAG}.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Improved reception in the backend and replaced thread
with periodic timer as thread was used only to
periodically poll RTT data availability and using timer
is more RAM-wise efficient.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
S1000 i2c test was blinking only blue and red lights. However, if
we have to distinguish between 2 test images for whatever reasons,
it is handy to have one test image blinking blue-red while the
other blinks green-white.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Idle rate functionality has been implemented for HID USB class.
Bassed on Device Class Definition for Human Interface Devices 1.11.
Tested with USB3CV and host with idle rate.
Signed-off-by: Marcin Szymczyk <Marcin.Szymczyk@nordicsemi.no>
HID class now defaults to universal request callbacks in case they
are not provided by the application. This applies to following,
class-specific requests: Get_Report, Set_Report, Get_Idle, Set_Idle,
Get_Protocol and Set_Protocol.
Tested with USB3CV.
Signed-off-by: Marcin Szymczyk <Marcin.Szymczyk@nordicsemi.no>
Allow logging subsystem to send the logging messages to outside
system. This backend implements RFC 5424 (syslog protocol) and
RFC 5426 (syslog over UDP).
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Rephrase some help messages to decrease flash usage.
Deactivate shell history feature for test test_netusb_rndis
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Resize command requires shell to be working on UART interrupt
driven API. This will be now enabled by default when shell serial
backend is selected. Recently this feature was accidentally turned
off in PR #11556.
k_sleep(1) has been replaced with k_busy_wait(1000) to avoid
hanging in command handler.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Shell used to require adding commands and subcommands in alphabetical
order to ensure correct autocompletion and printing options with the
<Tab> key.
Commit: bd3a4e5fe5 implemented correct
options printing with the <Tab> key for not sorted commands.
This PR allows to partially autocomplete not sorted commands.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Allow user to add externally built hex files to the cmake property
HEX_FILES_TO_MERGE. The hex files in this list will be merged
with the hex file generated when building the zephyr application.
This allows users to leverage the application configuration
available in Kconfig and CMake to help decide what hex file
should be merged with the zephyr application.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
The driver can be tested using different networking emulation
approaches.
This approach will work across multiple Qemu instances. There can be
more than one Qemu instance, run using the following command. They
would appear to be on the same Ethernet network.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net socket,mcast=230.0.0.1:1234 \
-kernel zephyr.elf
This approach will work with other virtualization technologies that
support connecting to a VDE switch, like VirtualBox and User Mode
Linux. The switch can be started using the following command.
$ vde_switch --sock /tmp/switch
Qemu can be connected to the switch using the following command.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net vde,sock=/tmp/switch \
-kernel zephyr.elf
Signed-off-by: Fadhel Habeeb <fadhel@zilogic.com>
Signed-off-by: Nirav Parmar <niravparmar@zilogic.com>
Signed-off-by: Vijay Kumar B <vijaykumar@zilogic.com>
Add missed out helper functions to update the errors.tx and error.rx
in the stats structure.
Signed-off-by: Fadhel Habeeb <fadhel@zilogic.com>
Signed-off-by: Nirav Parmar <niravparmar@zilogic.com>
Signed-off-by: Vijay Kumar B <vijaykumar@zilogic.com>
This patch adds dts/bindings/adi,adxl372-spi.yaml for
using ADXL372 on SPI bus instead of I2C which is used
in dts/bindings/adi,adxl372.yaml.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
The LFSTARTED event was disabled so it was impossible to wake the
CPU up on LF clock being ready. The Bluetooth stack was putting
the CPU to sleep, expecting to be woken up on LFSTARTED event.
As the event never triggered, the CPU was woken up seconds later
by a different event introducing a multi-second startup delay.
Bug introduced by 23c92100ac.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Timestamp function and pool for log_strdup were initialized
in log thread initialization while they should be initialized
in log_core_init() which is performed earliest possible. Log
API was using uninitialized data when called before log thread
was started.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The STM32L433 has the same layout than the STM32L432, additionally it
has GPIOD, GPIOE, I2C2, USART3 and SPI2.
Also move USART3 and SPI2 out of stm32l4.dtsi since STM32L432 does not
have it.
Fixes#10909.
Signed-off-by: Markus Roppelt <markus.roppelt@gmx.de>
