Commit graph

6627 commits

Author SHA1 Message Date
Sebastian Bøe 90332b9a0b dts: nordic: 54l: Change the peripheral address map for ns
Define peripherals with the 0x4000_0000 address range when building
for non-secure.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2024-05-24 18:00:47 -04:00
Sebastian Bøe 2c19d3ea92 dts: nordic: 54l: Don't define UICR for the non-secure domain
Don't define UICR for the non-secure domain as it is hardware fixed to
secure.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2024-05-24 18:00:47 -04:00
Sebastian Bøe 50aaaa30c2 dts: nordic: 54l: Don't define wdt30 for the non-secure domain
Don't define wdt30 for the non-secure domain as it is hardware fixed
to secure.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2024-05-24 18:00:47 -04:00
Flavio Ceolin 301055dec0 intel-adsp/ace: pm: Only core 0 can d0i3
Secondary cores are not allowed to be power gated on
runtime-idle. They have to explicitely set off by host command.

Remove this state from secondary CPUs so power management logic
does not need workarounds to enforce this behavior.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-05-24 09:53:04 -05:00
Celina Sophie Kalus bbbb2865c3 dts: stm32h7_dualcore: Add MBOX driver
Adding the new STM32 hardware semaphore driver into the device tree.

Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
2024-05-24 07:52:06 -04:00
Celina Sophie Kalus e178d21b96 dts: bindings: ipm: Add dummy mbox-cells property
The MBOX driver interface expects a device tree property '#mbox-cells'
which is not known by the IPM driver. This causes build problems when
both drivers are given for a single shared DT node.

To fix this problem for this driver specifically, add a dummy
'#mbox-cells' property to the bindings of the STM32 HSEM IPM driver.
This does not affect any other IPM driver, and the STM32 HSEM IPM driver
is still functioning with this dummy property.

Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
2024-05-24 07:52:06 -04:00
Celina Sophie Kalus e1ec8f5884 dts: bindings: mbox: Add STM32 HSEM MBOX driver
Add a device tree binding for the new driver. Since there already
exists an IPM driver using the unsharable hardware semaphore interrupt,
the new driver is not added to any boards or SOCs per default to avoid
compatibility problems. See #37300 for the IPM driver.

Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
2024-05-24 07:52:06 -04:00
Tomasz Chyrowicz 7d23bd2859 boards: nrf54h20dk: Add SUIT storage definition
Add a definition of SUIT storage, so there will be a common source of
the SUIT storage location for both SDFW and scripts generating SUIT
storage areas, assigned to local domains.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2024-05-24 07:49:42 -04:00
Hao Luo 266fb4c73a drivers: counter: Change apollo4p counter base address
Changed apollo4p counter base address to match the updated
counter driver.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-23 11:52:37 -04:00
Hao Luo d7afd88e71 drivers: counter: Add support for Apollo3 SoCs counter
This commit adds support for the counter which
can be found in Apollo3 SoCs

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-23 11:52:37 -04:00
Ioannis Karachalios 4e2ef1f525 dts: renesas: smartbond: Add support for the memory driver class.
Update DTS and board configurations to support memory controller (QSPIC2).

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2024-05-23 07:51:41 -04:00
Ioannis Karachalios 02e739873e drivers: memc: smartbond: Add support for the memory driver class.
Add support for the memory controller by utilizing QSPIC2. The latter is
capable to drive both NOR and PSRAM memory devices. For this to work,
the RAM driving mode is enabled.

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2024-05-23 07:51:41 -04:00
Emilio Benavente 14158d7bf9 dts: arm: nxp: nxp_ke1xz: added dts file.
Added required dts file to support frdm_ke1xz
platforms.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Signed-off-by: Pavel Krenek <pavel.krenek@nxp.com>
2024-05-22 15:42:48 -04:00
Hao Luo c8ae26549d drivers: i2c: Add support for Apollo3 SoCs I2C
This commit adds support for the I2C which
can be found in Apollo3 SoCs, it can work in
both DMA and non-DMA modes

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-21 20:55:34 -04:00
Phi Bang Nguyen ae8115275c dts: arm: nxp: Add devicetree node for MIPI CSI-2 Rx
Add a node for MIPI CSI-2 Rx in i.MX RT11xx devicetree and connect it to
the CSI node.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-05-21 15:19:52 -07:00
Phi Bang Nguyen fd157a81be dts: bindings: video: Add bindings for NXP MIPI CSI-2 Rx
Add bindings for NXP MIPI CSI-2 Rx which is a MIPI CSI-2 receiver
connecting a camera sensor to the NXP CSI.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-05-21 15:19:52 -07:00
Javad Rahimipetroudi 9d15f6623a driver: led: add support for TI TLC59731 RGB STRIP controller
TLC59731 is a 3-Channel, 8-Bit, PWM LED Driver with
TI Single-Wire interface (EasySet) protocol.

Signed-off-by: Javad Rahimipetroudi <javad.rahimipetroudi@mind.be>
2024-05-21 16:50:24 -04:00
Daniel DeGrasse 13ae32e1c2 drivers: display: st7735r: convert to MIPI DBI API
Convert the ST7735R display to use the MIPI DBI API. Boards and overlays
using this display are also updated.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-21 16:50:08 -04:00
Declan Snyder 9b9a4eb027 dts: nxp: Add comment reminders to some DT
The RTXXX and RW61X DT are using syscon compatible
depsite not having a syscon. This is a technical debt
to remain aware of. The reason they use these compatibles
is to use the syscon driver which is a shim to an SDK API
that is somewhat similar to syscon.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
Declan Snyder c2901c3bb6 dts: nxp: Add resets properties to LPC heritage
Add resets properties to nodes on the LPC heritage syscon parts.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
Declan Snyder 7a17e141cc dts: bindings: Add reset device to some NXP schema
Include reset device binding in some of the NXP LPC
IP bindings to be able to add the resets property.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
Declan Snyder 1db901e2c9 dts: bindings: Add bindings for NXP LPC resets
Add binding representing the peripheral reset controller
of the NXP LPC SYSCON heritage hardware including SYSCON
itself and the newer RSTCTL.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
Declan Snyder eb866a345d dts: bindings: reset_controller: Clarify cell name
Clarify that there needs to be a cell named "id" in order
to be usable by the reset controller macros.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
cyliang tw 60ccb8e425 dts: arm: nuvoton: add pwm node of numaker m2l31x
Update m2l31x.dtsi, to add pwm nodes for pwm driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-05-21 16:43:46 -04:00
Ioannis Damigos ffa5b30c33 dts/bindings/renesas,smartbond-lp-osc: Substitute calibration-interval
Substitute calibration-interval property with kconfig option
SMARTBOND_LP_OSC_CALIBRATION_INTERVAL

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-05-21 18:43:43 +02:00
Andrej Butok 14762736b1 dts: nxp_mcxn94x: fix flash write-block-size
- Fix mcxn94x flash write-block-size from 16 to 128.
- Fix flash_program() return error 0x65,
  that means "Address or length does not meet the required alignment."
- The mcxn94x Flash ROM API flash_program() start address and
  the length must be 128 bytes-aligned.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2024-05-21 18:40:19 +02:00
Nazar Palamar 242f1f6b78 dts: infineon: move xmc4*** to cat3\xmc\*
- move dts\arm\infineon\xmc4*** files to dts\arm\infineon\cat3\xmc\*

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-05-21 11:29:49 +01:00
Nazar Palamar 6ad6d59c4d dts: infineon: port infineon CAT1A (psoc6) to HWMv2
port infineon CAT1A (psoc6) to HWMv2:
1. move dts\arm\cypress\**  to dts\arm\infineon\cat1a\legacy
2. remove dts\arm\cypress\**
3. rename dts\arm\infineon\psoc6 to dts\arm\infineon\cat1a

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-05-21 11:29:49 +01:00
Juliane Schulze 72b20315ea drivers: set LIS2DH default trigger mode to "EDGE_BOTH"
Previous value just activated the ability to trigger for both edges,
without (de)-activating the gpio. This caused an assrtion error in GPIO.h.

Fixes #71227

Signed-off-by: Juliane Schulze <juliane.schulze@deveritec.com>
2024-05-20 18:05:01 +02:00
Jeppe Odgaard 5e4d55246a dts: bindings: add festo_veaa_x_3 support
Add bindings for the Festo proportional pressure regulator.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-05-18 15:56:09 +03:00
Jeppe Odgaard b6cc70e438 dts: bindings: Add vendor prefix festo
Add vendor prefix for Festo SE & Co. KG

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-05-18 15:56:09 +03:00
Phi Bang Nguyen e987321b25 dts: bindings: Add bindings for ov5640 camera
Add bindings for ov5640 camera sensor

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-05-17 14:50:56 -05:00
Andrzej Głąbek fa86c518f6 dts: nordic: nrf54h20: Fix exmif node definition
Remove the "snps,designware-spi" compatible from the EXMIF node in
nRF54H20i, as the spi_dw driver cannot be used for this peripheral
without Nordic-specific modifications that are not present upstream.
An attempt to do so (just setting CONFIG_SPI=y will cause that,
as the driver initialization function will be executed then) results
in a bus fault.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-05-17 14:41:20 -05:00
Johann Fischer c00071574a dts: nordic: update USBHS node
Add "nordic,nrf-usbhs" vendor compatible and new required properties.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-05-17 14:05:08 +01:00
Johann Fischer 6d06a8cea9 drivers: udc_dwc2: use devicetree to configure endpoint capabilities
Although we can get the number of configured OUT and IN endpoints and
endpoint capabilities from the DWC GHWCFGn registers, we need to
configure the number of endpoint configuration structs at build time. On
some platforms, we cannot access the hardware register at pre-init, so
we use the GHWCFGn values from the devicetree to provide endpoint
capabilities. This can be considered a workaround, and we may change the
upper layer internals to avoid it in the future.

Also, add a new vendor quirk to fill in platform-specific controller
capabilities.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-05-17 14:05:08 +01:00
Jeppe Odgaard c9f53d3374 drivers: sensor: add Innovative Sensor Technology TSic xx6 driver
Add driver for TSic 206/306/316/506F/516/716 temperature sensor.
The driver uses PWM capture driver to read a single wire with
Manchester-like encoding.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-05-16 18:57:24 -04:00
Mahesh Mahadevan 648bc402dc dts: rw61x: Add Idle and Suspend power modes
The Power states map to Power Mode 1 and 2.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-05-16 18:53:51 -04:00
Declan Snyder c63cef98fc dts: arm: nxp_rw610: Add OS_Timer
Add OS Timer to device tree

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-16 18:53:51 -04:00
Grzegorz Swiderski 7e95816baf dts: bindings: Move zephyr,memory-region property definition
Move it to a common file named `zephyr,memory-common.yaml`, which
replaces `zephyr,memory-attr.yaml` and takes its contents as well.

This is so that another binding, e.g., `vnd,memory-region`, can support
being combined with the `zephyr,memory-region` binding like so:

  node@deadbeef {
    compatible = "vnd,memory-region", "zephyr,memory-region";
    zephyr,memory-region = "NAME";
    ...
  };

To allow this, edtlib would require `vnd,memory-region` to include the
property definitions from this new common file.

The same can't be done by including `zephyr,memory-region.yaml` directly
because that file marks the property in question as always required, and
it shouldn't be required whenever the `vnd,memory-region` compatible is
used on its own.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-05-16 15:18:46 +01:00
Jérémy LOCHE - MAKEEN Energy 724be84957 nxp: imx7d-6sx: add rom_start relocation
Add the Kconfig options and use the aliased
addresses for the bootcode regions of the IMX7D
and IMX6SX SOCs to allow the Linux rproc
framework to load the irq-vectors into
the correct memory areas.

Activating this option might enlarge the bin
file if the zephyr,flash and rom_start chosen
region addresses are not matching.

It is up to the user to enable this feature
based on code location choices (OCRAM, DDR, TCM...).

Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
2024-05-16 15:52:20 +02:00
Armin Brauns 0023986bb2 boards/stm32f769i_disco: add accessible memory region for QSPI flash
By default, the QSPI region is marked as EXTMEM and inaccessible
(see #57467), mark the first 64MB as IO on stm32f769i_disco.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-05-16 15:52:01 +02:00
Alberto Escolar Piedras ba1855632f broadcom/bcm2712: Fix UART DT
Its UART driver needs the interrupt-names property,
let's add it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-05-16 14:27:21 +02:00
Chris Friedt cf8a756e67 dts: bindings: gpio: remove unused reg property from emul driver
The gpio-emul driver does not actually require any reg property,
since it is not in the physical memory map of any device. So
let's remove that property from the bindings.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2024-05-16 13:31:39 +02:00
Henrik Brix Andersen aed0fbf774 drivers: can: remove initial bus-speed/bus-speed-data properties
Remove all CAN controller "bus-speed" and "bus-speed-data"
properties. These all use the default bitrates set via Kconfig.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-05-16 09:23:59 +02:00
Henrik Brix Andersen 0f7cd6128e drivers: can: set default initial bitrates via Kconfig
Set the default initial bitrates globally via Kconfig. The initial bitrates
can still be overridden using the "bus-speed" and "bus-speed-data"
devicetree properties.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-05-16 09:23:59 +02:00
Mahesh Mahadevan 04ce8801d9 dts: nxp_mcxn94x: Add USBHS support
Add support for the USB High Speed controller

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-05-16 09:17:18 +02:00
cyliang tw d545c1f377 dts: arm: nuvoton: add rtc node of numaker m2l31x
Update m2l31x.dtsi, to add one rtc node for rtc support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-05-15 17:11:28 +01:00
Zhaoxiang Jin 71c60a84f1 dts: arm/nxp/mcxn94x: Add lpadc nodes for NXP mcxn94x
Add lpadc nodes for NXP mcxn94x

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-05-15 17:28:38 +02:00
Zhaoxiang Jin f61c6fdf06 dts: arm/nxp/mcxn94x: Add vref node for NXP MCXN94x
Add the vref node for NXP MCXN94x

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-05-15 17:28:38 +02:00
Zhaoxiang Jin fd736c4f2d drivers: regulator/nxp_vref: Remove nxp_ground_select property
Remove nxp_ground_select property.
Delete the use of NXP vref peripheral CSR register REFL_GRL_SEL bit.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-05-15 17:28:38 +02:00
Daniel Schultz 481bd6db8b boards: phytec: Remove Messtechnik GmbH
PHYTEC has multiple offices in different locations like
the US, France, India and China. The headquarter is located in
Germany. Since now 50% of the PHYTEC boards are from the US
office, we should drop 'Messtechnik GmbH', which is the offical
title of the German office, and keep the name more general.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-05-15 16:09:55 +02:00
Hao Luo a64b069785 drivers: gpio: Add support for Apollo3 SoCs GPIO
This commit adds support for the GPIO which
can be found in Apollo3 SoCs

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-15 16:08:29 +02:00
Francois Ramu 6de81b2b7d dts: arm: st: stm32h5 serie has xspi node
Define the xspi node instead of ospi. Note that RCC CCIPR4 register
keeps the OCTOSP1 for clock domain selection.
Change the header file to xspi for the stm32 devices with xspi
peripheral. Keep the flash_controller/ospi.h for bindings compatibilty.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-05-15 10:56:04 +02:00
Francois Ramu e255444179 dts: bindings: introduce a new compatible for stm32 xSPI flash controller
The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-05-15 10:56:04 +02:00
Andrzej Głąbek 41786a6477 drivers: sensor: Add driver for nRF temperature sensor accessed via nrfs
Add driver, together with the corresponding dts binding and node in
the nRF54H20 SoC definiton, for the nRF temperature sensor that cannot
be accessed directly but only through nRF Services (nrfs) layer.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-05-15 09:25:30 +01:00
Filip Kokosinski 00b2ef8744 dts: set the riscv,isa property for virt-based targets
This commit makes the devicetrees of the targets that are based on the QEMU
`virt` machine more consistent with the rest of the RISC-V targets in
Zephyr by:
* adding the `riscv,isa` property
* adding a compatible string which uniquely identifies the `virt` core

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-05-15 09:30:23 +02:00
Daniel DeGrasse 3493d95ed0 dts: arm: nxp: mcxn94x: add USDHC0 node
Add USDHC0 node to the mcxn94x devicetree. This node describes the one
instance of the Ultra Secured Digital Host Controller IP present on the
MCXN94x series SOCs.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-14 20:23:28 -04:00
Phi Bang Nguyen ba1565b46d drivers: video: csi: Rename sensor to source
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-05-14 20:23:15 -04:00
Johann Fischer c0e8f0d96b usb: device_next: add initial HID device support
Add initial HID device support. Unlike the existing HID implementation,
the new implementation uses a devicetree to instantiate a HID device.
To the user, the HID device appears as a normal Zephyr RTOS device.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-05-14 18:24:45 -04:00
Declan Snyder 79025c5524 soc: nxp: rw: Support ADC and DAC
Add DT node entries to RW for DAC and ADC.

Support the SOC required initialization of the DAC and ADC on RW.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-14 18:23:22 -04:00
Declan Snyder c767ed6e27 dts: bindings: adc: Add NXP GAU ADC binding
Add binding for NXP GAU ADC

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-14 18:23:22 -04:00
Declan Snyder f7f80b6cd7 dts: bindings: dac: Add NXP GAU DAC binding
Add binding for NXP GAU DAC

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-14 18:23:22 -04:00
Ayush Kothari 13dfd86616 Driver: Add pin inversion to Esp32 Uart
Additional properties are added to esp32 uart to allow
for signal inversion.

Signed-off-by: Ayush Kothari <ayush@croxel.com>
2024-05-14 18:21:27 -04:00
Armin Brauns 74cc85c526 dts: stm32f7: add clock definition for OTG_HS peripheral
This peripheral is also run off the 48MHz clock, just like OTG_FS.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-05-14 17:04:49 +02:00
Jun Lin b5f8b4b6b7 pinctrl: npcx: add nodes for Serial Port SIO clock selection
This commits adds required pinctrl node to provide the corresponding SIO
clock selection for the Serial Port under the different VOSCCLK.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-05-14 13:25:43 +02:00
Aurelien Jarno 3d4c5e2dc8 dts/arm/st: wl: change cpu0 compatible to arm,cortex-m4
The STM32WL SoC has a Cortex M4 CPU without FPU. Change the cpu0
compatible string accordingly.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2024-05-14 09:38:16 +02:00
Jamie McCrae 4bea96b68b drivers: led_strip: Add length function
Adds a length function which returns the length of the LED strip

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2024-05-14 09:33:58 +02:00
Jamie McCrae f4a3771f8e dts: bindings: led_strip: Add common binding
Adds a common binding with a chain length and colour ordering
property

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2024-05-14 09:33:58 +02:00
Samuel Kleiser d796c117ce stm32: ospi: make all clk, dqs, ncs pins configurable
The clk, dqs and ncs pins can be remapped between OSPI instances, but the
driver doesn't support it, yet. Therefore replace hard coded numbers to
device tree optional properties.

Signed-off-by: Samuel Kleiser <s.kleiser@vega.com>
2024-05-14 09:32:57 +02:00
Daniel DeGrasse 84b8e92445 soc: nxp: imxrt: clock imxrt1042 SOC at 528 MHz
iMXRT1042 SOC should be clocked at 528 MHz maximum. Correct the clock
setup to use the system PLL.

Fixes #70755

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-13 16:37:17 -04:00
Daniel DeGrasse 9668b35ce7 soc: nxp: imxrt: allow configuring system pll on iMXRT10xx series
Allow configuration of the system pll on the iMXRT10xx series parts, via
a fractional pll node under the CCM module.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-13 16:37:17 -04:00
Fredrik Gihl 2d31d45429 drivers: sensors: Add support for ds18s20
Added support for the older ds18s20 inside the (newer) ds18b20.

Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
2024-05-13 16:06:35 -04:00
Tim Lin 682a4c936a ITE: soc: Add the variant of it81302dx
Add the variant of it81302dx

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-05-13 11:39:10 +02:00
Tim Lin f89934451f ITE: soc: Add the variant of it81202dx
Add the variant of it81202dx

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-05-13 11:39:10 +02:00
Krzysztof Chruściński e7235f80cc dts: bindings: serial: nrf-uart: current-speed shall be required
Adding required flag to the current-speed as without this driver
does not compile.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-05-13 11:39:03 +02:00
Jędrzej Ciupis 5df6f99c40 dts: common: nordic: add ieee802154 node to nrf54h20 cpuapp
This commit adds an ieee802154 node to the list of nRF54H20 application
core's peripherals. While it does not translate directly into a physical
RADIO peripheral, it represents the capability to use the ieee802154
radio indirectly through cpurad.

Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2024-05-13 10:21:08 +02:00
Abderrahmane Jarmouni ac00136dfd dts: arm: st: stm32-rtc: add alrm-exti-line property
Add alrm-exti-line to STM32 RTC node of concerned series.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-13 09:45:17 +02:00
Abderrahmane Jarmouni e2bd33bf6c dts: bindings: rtc: stm32-rtc: add alrm-exti-line property
Gives number of the Extended Interrupts and Event Controller (EXTI)
interrupt line connected to the RTC Alarm event.
Used on all series, except WBAX & U5X, where RTC Alarm interrupt is
routed directly to Nested Vectored Interrupt Controller (NVIC) and to
Power Control (PWR) wake-up pins.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-13 09:45:17 +02:00
Abderrahmane Jarmouni 0c4548c13b dts: arm: st: stm32-rtc: add alarms-count property
Add alarms-count to STM32 RTC node of all series except F1X.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-13 09:45:17 +02:00
Abderrahmane Jarmouni 2da205527f dts: bindings: rtc: stm32-rtc: add alarms-count property
Add alarms-count property to STM32 RTC binding

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-13 09:45:17 +02:00
Grzegorz Swiderski 97a83ef8a7 dt-bindings: misc: Add nRF54H20 Domain IDs and Owner IDs
Move the Domain IDs from `nrf54h20.dtsi` into its own header file.
Additionally, include another header with Owner IDs.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-05-13 10:36:37 +03:00
Jerzy Kasenberg 961959fc5f drivers: serial: Smartbond: add support DTR line wakeup
This change allows to use DTR line driven from external serial port
that when active (low) will prevent UART device from going to sleep.
It will also wake up platform when DTR line becomes active.

DTR line is often activated in serial port connected to host computer
when operating system opens serial device like COMx for Windows
or /dev/ttyACMx /dev/ttyUSBx for Linux based systems.

DTR line (specified in device tree) will be used by WAKEUP and PDC
controllers (via GPIO driver) to handle DTR line changes.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-05-12 17:03:17 -04:00
Jerzy Kasenberg f10b77364a drivers: serial: Smartbond: add support RX line wakeup
This change allows to wake up UART from sleep mode when
low level on inactive UART is detected during platform sleep.

Timeout can be specified for each UART separately in device tree.
If one of the UARTs is selected as console sleep timeout is taken
from Kconfig same way other platform configure same functionality
using CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-05-12 17:03:17 -04:00
Jerzy Kasenberg 095bfba1d7 drivers: serial: Smartbond: Flow control for uart2 and uart3
UART2 and UART3 (unlink UART) do support hardware flow control.
This simply add necessary flag that is already handled in the code.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-05-12 17:03:17 -04:00
Peter van der Perk 7adc4b689b drivers: serial: mcux lpuart add (tx/rx)invert and single wire
Adds device tree definitions to enable tx/rx invert and singlewire modes

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2024-05-10 18:25:03 -04:00
Matthias Alleman c2f35a4168 dts: nxp: rt1060: Fix wrong reg address of enet2
Correction of the reg address of enet2 for nxp_rt1060.

Regression introduced at 537d5c310c

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2024-05-10 18:08:40 -04:00
cyliang tw de58070fa4 drivers: pinctrl: support digital-path-disable for Numaker
Add new property digital-path-disable for Nuvoton numaker pinctrl driver.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-05-10 18:06:15 -04:00
Aaron Ye e32c2ee296 dts: arm: ambiq: add flash controller instance for Apollo3 Blue SOC
This commit adds flash controller instance for Ambiq Apollo3 Blue SOC
and Apollo3 Blue Plus SOC.
Also create the partitions on this flash controller node for apollo3_evb
and apollo3p_evb.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2024-05-10 13:30:33 +02:00
Grzegorz Swiderski 8e63e0657b soc: nordic: nrf54h20: Make HSFLL trims optional
If no HSFLL needs trimming, then `trim_hsfll()` should be compiled out.
This makes it easier to reuse the rest of `soc.c` out of tree.

Furthermore, some HSFLL instances can be trimmed before booting Zephyr,
so the FICR client properties in the DT binding should not be required.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-05-09 12:41:17 -04:00
Mayank Mahajan d1687a557c ADD: Driver for Sensor INA226
INA226 - Bidirectional Current and Power Monitor w/ I2C
Boards Tested: mr_canhubk3

Signed-off-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
2024-05-09 15:46:31 +02:00
Bjarki Arge Andreasen 3769648793 drivers: gnss: Add emulated GNSS device driver
The emulated GNSS driver behaves like a GNSS, implementing
device pm and the GNSS APIs, using only kernel features (
zephyr work queue and uptime) making it buildable on all
zephyr targets.

The purpose of this device driver is to tailor and validate
the gnss api test suite.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2024-05-09 15:45:34 +02:00
Sebastian Głąb 2f17c46fb1 drivers: wdt: nrf: Add WDT instances that exist in nrf54h20
Add WDT instances no. 010, 011, 131, 132.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2024-05-09 15:44:40 +02:00
Chekhov Ma ad2745471c drivers: mfd: add new driver "mfd_adp5585"
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2024-05-08 16:09:08 -04:00
Alberto Escolar Piedras 0ecfac663d dts: nordic nrf-timer: Expose max frequency as DT property
The counter driver needs to know what is the maximum
counting frequency of each timer peripheral.
Let's add it to its DT.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-05-08 15:58:16 -04:00
Stoyan Bogdanov 3d60d551c4 dts: bindings: Add SDP-120 connector GPIO ADI
Add binding for adi SDP-120 connector and header file
with marcos to map signals using signal names.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2024-05-08 15:51:42 +02:00
Benjamin Cabé 5d7216fc93 dts: fix bad SPDX-License-Identifier header
fix typo in SPDX header

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2024-05-08 09:23:16 -04:00
Richard Wheatley e9619c3898 dts: arm: ambiq: apollo4p CPU state
Added CPU Power Management states

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-05-08 12:41:14 +02:00
Richard Wheatley 1caa52be5b dts: arm: ambiq: Fix Flash Controller
Fix the flash controller for Ambiq apollo4p processors.

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-05-08 12:41:14 +02:00
Romain Pelletant bb0277da16 pinctrl: stm32: add remap support for STM32C0
Add remap11 and remap12 support for STM32C0 series

Signed-off-by: Romain Pelletant <romainp@kickmaker.net>
2024-05-07 15:19:23 -05:00
Daniel DeGrasse 23bb8fc6ae drivers: memc: add driver for is66wvq8m4 PSRAM using MCUX FlexSPI
Add driver for IS66WVQ8M4 PSRAM, using the MCUX FlexSPI interface to
write data to the PSRAM device.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-07 15:06:25 -05:00
Daniel DeGrasse 88802acf78 drivers: memc: memc_mcux_flexspi: support diff RX clock source on port B
Some instances of the FlexSPI IP support a different clock source being
used for port B of the FlexSPI instance. Add a devicetree property and
driver support to enable configuring this property of the hardware.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-07 15:06:25 -05:00
Hao Luo d71c97f072 drivers: pinctrl: Add pinctrl driver for Apollo3 SoCs
This commit adds pinctrl support for Apollo3 SoCs.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-07 18:57:19 +02:00
Hao Luo 7b115fea81 soc: arm: ambiq: apollo3: Add support for Apollo3 Blue SoC
Add all required parts (new SoC family/series, device tree) for
the Ambiq Apollo3 Blue SoC.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-07 18:57:19 +02:00
Hao Luo a0b07212e9 soc: arm: ambiq: apollo3: Add support for Apollo3 Blue Plus SoC
Add all required parts (new SoC family/series, device tree) for
the Ambiq Apollo3 Blue Plus SoC.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-07 18:57:19 +02:00
Rafał Kuźnia 4d30ccb878 dts: nordic: add EXMIF peripheral description to nRF54H20
Added EXMIF peripheral DTS description and bindings.
The peripheral operates as an SPI device.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
2024-05-07 09:52:53 +01:00
Arunmani Alagarsamy b116bc7da0 boards: silabs: efr32_radio: Remove duplicate usart0 definition
In the <board>.dts file, the definition for usart0 was found to be
redundant as the same information is already provided in the included
.dtsi file. this commit removes the duplicate definition of usart0,
resulting in a cleaner and more maintainable device tree configuration.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-05-07 09:50:10 +02:00
Angelo Dureghello dc376a8bd9 drivers: eth: phy: adin2111: add support for adin1100 phy
Add support for similar adin1100 phy, boath are 10Base-T1L,
only difference is that adin1100 connects through r/mii.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2024-05-07 09:41:46 +02:00
Angelo Dureghello a7c720b7d4 dts: arm: st: add mdio node for h5 and h7
Add mdio node for h5 and h7 series.

Since MDIO registers are part of the same ETH hw IP, keeping mdio
node just as a child of mac/eth, cannot see as appropriate to assign
an adddress to it.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
2024-05-07 09:41:46 +02:00
Angelo Dureghello fe29929c91 drivers: mdio: add stm32 mdio support
MDIO is part of the ETH IP, but some phy chip may need a
specific phy driver to set up certain vendor registers enabling
particular features.

Add support for stm32 mdio access.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
2024-05-07 09:41:46 +02:00
Thibo Verheyde e402b0304b dts: bindings: Add Sequans GM02S Modem
Add Sequans GM02S modem binding using the sqn vendor prefix.
The modem has an active low reset signal.

Signed-off-by: Thibo Verheyde <thibo@dptechnics.com>
2024-05-06 22:51:28 +01:00
Jeronimo Agullo 7ae9a16ca6 drivers: gnss: Air530z: Add new driver
Intial driver adding intial script to receive only GGA, RMC and GSV
NMEA messages, configuring fix rate, setting enabled system and adding
power management with the module on-off pin.

Signed-off-by: Jeronimo Agullo <jeronimoagullo97@gmail.com>
2024-05-06 22:50:30 +01:00
Louis Feller 0c6baa5854 dts: stm32wba: Fix RNG base address
Set RNG address to its non-secure alias.
See RM0493 STM32WBA5 Reference manual for details.
Using the secure alias (0x5..)instead of the non-secure alias (0x4..)
for this peripheral results in a SecureFault during kernel init if
TrustZone is activated, Zephyr is running as NSPE and RNG is
enabled.

Signed-off-by: Louis Feller <louis.feller@st.com>
2024-05-06 17:32:25 +01:00
Aurelien Jarno 7fff27329d dts/arm/st: wl: decrease Sub-GHz SPI frequency to 8MHz
Commit 246ea739bb ("dts/arm/st: wl: increase Sub-GHz SPI frequency to
12MHz") increased the Sub-GHz to 12 MHz. This matches the SX126x
datasheet, but there is no information about the maximum speed in the
STM32WL datasheet or reference.

This works fine when not using DMA. However with DMA activated (adding
entries to the device-tree and enabling CONFIG_SPI_STM32_DMA), I have
encountered some rare corruption. When it happens, the read from the
Sub-GHz device gets an extra 0x00 byte prepended, which confuses the
LoRaMac-node library and causes reception failures. Decreasing the
frequency to the next round number, that is 8 MHz (i.e. increasing the
prescaler from 4 to 6) fixes all the issues I encountered.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2024-05-06 14:59:16 +01:00
Pieter De Gendt f147a5fec2 spelling: Replace occurrences of "iff" with "if and only if"
Spell checking tools do not recognize "iff", replace with "if and only if".
See https://en.wikipedia.org/wiki/If_and_only_if

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-05-06 14:58:08 +01:00
Luis Ubieda a0fc2de8b3 dts: bindings: vendor-prefixes: Add Croxel
Adding Croxel to the list.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2024-05-06 14:55:25 +01:00
Charles Dias bdd4e61a25 drivers: video: Add support for STM32 DCMI
Add Kconfig, DCMI driver, Yaml, and CMakeLists files

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2024-05-06 14:54:35 +01:00
Charles Dias d49ba8b95e dts: arm: st: h7: add DCMI node into DTSI file
Add the DCMI node into stm32h7.dtsi.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2024-05-06 14:54:35 +01:00
Fabio Baltieri 06236ba883 drivers: ht16k33: convert from kscan to input
Convert the ht16k33 to use the input subsystem. This can still be used
with the kscan API with the zephyr,kscan-input driver, or use the
input-keymap one to generate input codes instead.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-05-06 14:53:36 +01:00
Romain Pelletant c8bd343309 dts: st: add stm32c011X6 support
Provide support for STM32C011X6 family support

Signed-off-by: Romain Pelletant <romainp@kickmaker.net>
2024-05-02 22:41:51 +01:00
Jose Alberto Meza 30eda2058b treewide: drivers: espi: Adjust terms per eSPI specification 1.5
1) Replace master/slave in API for new terms in eSPI spec 1.5
2) Reflect eSPI VW change and macro changes across eSPI drivers
3) Update terms in eSPI driver sample and eSPI test driver

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2024-05-02 13:56:46 -04:00
cyliang tw 0190ed2713 drivers: adc: support Nuvoton numaker m2l31x
Update m2l31x.dtsi for adc support and update adc_numaker.c
to support acquisition time in 0~255 ADC ticks.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-05-02 09:58:43 +01:00
Mykola Kvach b8f7fc3cc3 drivers: sdhc: add support of Renesas MMC driver
Add basic functionality of Renesas SD/MMC driver. It can be used
for both gen3 and gen4 R-car boards, but tested only with H3ULCB,
Salvator XS M3 and Spider boards. This driver working with SDHC
subsystem.

The driver supports regularal reading/writing throught SD/MMC
controller buffer, DMA mode w/o interrupts and timing tuning.

Add gpio5 and sd0 nodes to h3ulcb and salvator xs which are needed
for working with SD cards. The GPIO node is needed for switching
voltage on SD card through gpio regulator driver.

Notes:
    * the driver doesn't support SPI mode;
    * SCC tuning and DMA mode based on IRQs are enabled by default;
    * an address of a data buffer has to be aligned to 128 bytes if it
      is not, driver will use non-DMA mode automatically;
    * Renesas MMC DMAC doesn't support 64-bit DMA addresses, so for
      case when we have 64-bit xref data address we use non-DMA mode;
    * SD/MMC controller supports block size between 512 and 1 with
      a lot of restrictions, more details you can find in code;
    * support of HS400 mode isn't implemented inside driver.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2024-05-01 10:55:11 -04:00
Damian Nikodem 6205f82d4f intel_adsp: adsp_memory: update mtl memory definitions
This commit updates the device tree and memory header file
for the Intel MTPM 1.5 platform to define the LSBPM and
HSBPM registers.

Changes include:
- Added node definitions for 'lsbpm' and 'hsbpm' in
intel_adsp_ace15_mtpm.dtsi
- Updated adsp_memory.h

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-05-01 10:31:52 +02:00
Damian Nikodem 6fe16960fd intel_adsp: adsp_memory: update lnl memory definitions
This commit updates the device tree and memory header file
for the Intel LNL 2.0 platform to define the LSBPM and
HSBPM registers.

Changes include:
- Added node definitions for 'lsbpm' and 'hsbpm' in
intel_adsp_ace20_lnl.dtsi
- Updated adsp_memory.h

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-05-01 10:31:52 +02:00
Damian Nikodem 2176ca9f9b intel_adsp: adsp_memory: update cAVS 2.5 memory definitions
This commit updates the device tree and memory header file
for the Intel cAVS 2.5 platform to define the LSBPM and
HSBPM registers.

Changes include:
- Added node definitions for 'lsbpm' and 'hsbpm' in
intel_adsp_cavs25.dtsi and intel_adsp_cavs25_tgph.dtsi
- Updated adsp_memory.h

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-05-01 10:31:52 +02:00
Charles Dias fa19161527 drivers: video: ov2640: add clock rate control property
Add Clock Rate Control property to OV2640 CMOS video sensor

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2024-05-01 00:14:18 +02:00
cyliang tw 183edd2549 drivers: rtc: support for Nuvoton numaker m46x
Add Nuvoton numaker RTC driver including RTC alarm feature.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-04-30 14:31:29 -04:00
Fredrik Gihl be25e34a7c drivers: sensor: Add TI TMP114 temperature sensors
Add device driver for TI TMP114 I2C temperature sensor.
The driver only support basic functionality, i.e. fetch temperature
using default values.

Datasheet:
	https://www.ti.com/lit/ds/symlink/tmp114.pdf

Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
2024-04-30 14:31:07 -04:00
Diego Herranz 0ac898026d dts: stm32f446: add missing adc2 and adc3
The STM32F446 product line includes 3 ADCs, but adc2 and adc3 were
missing the DTS.

Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
2024-04-30 18:23:16 +02:00
Raffael Rostagno f4a6fd1f3f drivers: esp32: SDHC implementation
Implementation of SDHC driver for ESP32

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-04-30 18:23:06 +02:00
Jiafei Pan 3cf52f873c dts: mimx93: add tpm counter
Add device tree node for TPM counters.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-30 08:53:59 +02:00
Marouen Ghodhbane 3fb0e784ff drivers: counter: mcux: add support for TPM
Add TPM native Zephyr driver. It's mainly inspired from the GPT
counter implementation.

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-30 08:53:59 +02:00
Chen Xingyu 979cd1dfe8 drivers: display: st7789v: Add support to disable inversion mode
For historical reasons, inversion mode is enabled by default in the
current implementation. This commit introduces an `inversion-off`
boolean DTS property, allowing it to be disabled if necessary.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2024-04-29 11:02:20 +02:00
Benedikt Schmidt c107f12832 dts: bindings: sensor: add binding for temperature sensor NCT75
Add a binding for the ON Semiconductor temperature sensor NCT75.

Signed-off-by: Benedikt Schmidt <benediktibk@gmail.com>
2024-04-26 19:22:09 -04:00
Declan Snyder ee1499e93b dts: nxp_rt1010: Fix typos in comments
Fix typos in the comments in this file

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-26 19:48:24 +01:00
Declan Snyder 0d97fa3a2d dts: rt1015: Remove ethernet node
There is not an ethernet on RT1015.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-26 19:48:24 +01:00
Jun Lin 08fedb4a80 drivers: uart: npcx: add asychronous API support
This commit implement the UART asynchronous API mode support.
When the API is used, the UART hardware cooperates with the DMA (MDMA)
module to handle the the data transfer and receiving.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-04-26 16:13:25 +02:00
Ricardo Rivera-Matos f9ce311855 regulator: cp9314: Adds support for PGOOD pin
Adds support for the PGOOD pin. This pin is asserted by the
regulator when converter startup has completed and the output
is stable. If the PGOOD pin is not used, the PGOOD state is
check via the PGOOD_PIN_STS bit.

Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
2024-04-26 16:08:39 +02:00
Hardeep Sharma 4d11e42d62 dts: intel_socfpga: Added altera FPGA driver dtsi node
Added altera FPGA driver dtsi node

Signed-off-by: Hardeep Sharma <hardeep.sharma@intel.com>
2024-04-26 09:30:24 +02:00
Arunmani Alagarsamy 78150c8e1b boards: silabs: Add I2C node
Add i2c pincntrl to silabs boards that supports pinctrl api.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-04-25 18:07:48 -04:00
Arunmani Alagarsamy 0810180135 drivers: i2c: i2c_gecko: Refactor driver to use pinctrl api
Deprecate the use of location_* properties in the i2c_gecko driver
and migrate to the pinctrl api for enhanced maintainability and
compliance with current standards.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-04-25 18:07:48 -04:00
Myeonghyeon Park 63692c1349 board: raspberrypi: enable serial communication on Raspberry Pi 5
Enable serial communication through UART port between HDMI ports.

Signed-off-by: Myeonghyeon Park <myeonghyeon@tsnlab.com>
Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Junho Lee 76ec481794 soc: brcm: add support for BCM2712
Add support for BCM2712, SoC of Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Junho Lee 31baddaa51 drivers: gpio: add brcmstb gpio driver
Add GPIO driver for brcmstb, required by Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Nikodem Kastelik a6f57fae0b dts: bindings: pwm: nordic: add memory-region support
This property will allow PWM driver allocate data buffer
in appropriate memory region.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-25 17:59:27 -04:00
Andrzej Kaczmarek fbc7a9e209 soc: arm: smartbond: Add support for extended sleep
This enabled extended sleep for Renesas SmartBond(tm).

Extended sleep is low power mode where ARM core is powered off and can
be woken up by PDC. This is default sleep mode when CONFIG_PM is
enabled.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Grzegorz Swiderski a0df4272ac dts: broadcom: Move viper-common.dtsi to dts/common
Squash the two copies of this file found in `dts/arm` and `dts/arm64`.
Their contents were identical up to devicetree property ordering.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-25 09:46:25 -04:00
Grzegorz Swiderski 3ddfa67655 dts: broadcom: Remove old copy of viper-a72.dtsi
This file was moved to the `dts/arm64` directory 3 years ago:
3539c2fbb3

However, the original file in `dts/arm` was left by mistake. Since then,
it's been unused and seldom updated, but it hasn't diverged much.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-25 09:46:25 -04:00
Mykola Kvach 797158997f boards: arm64: add support of Renesas Spider S4 A55 board
Add support of 'rcar_spider_s4/r8a779f0/a55' board: minimal dts
and configuration.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2024-04-25 14:54:51 +02:00
Jakub Zymelka 5e4cb886f4 dts: nordic: Change IRQ number for GPIOTE instances for nRF54L15
Adjusting the interrupt numbers for individual cores
to match the definitions in nrfx.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-04-25 12:43:58 +00:00
Marcin Niestroj 14c6eef241 dts: bindings: display: gc9x01x: make 'reset-gpios' optional
Driver already handles the case when 'reset-gpios' is not provided, so
remove 'required: true' from bindings to allow boards / shields definition
without reset signal being connected to any Zephyr controlled GPIO.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-04-25 07:42:46 -04:00
Håkon Amundsen 5895be5438 dts: nordic: add USBHS node for nrf54h20
Add missing USBHS node to list of global peripherals.

Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
2024-04-25 11:05:41 +00:00
Damian Nikodem 2455436337 driver: ssp: update Intel SSP DAI driver to support dynamic SSP management
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the management
of the DAI part from the management part of the SSP IP.

Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
  approach.
- Update device tree bindings and instances to reflect the new SSP IP
  management mechanism.

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-04-25 12:14:50 +02:00
Jeff Daly 7e0a334060 drivers: sensor: ntc_thermistor: Add Murata NCP15XH103
Murata NCP15XH103 compensation table added.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2024-04-24 15:56:23 -04:00
Daniel Schultz 5dbfbbcca2 dts: arm: ti: am62x_m4: Remove address-cells from gpio
An address-cells definition is not required for the gpio
node and therefore should be removed.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Daniel Schultz d30cbe999a dts: arm: ti: Add dtsi for AM64x M4
This file is basically a copy of the AM62x M4 dtsi but an
additional mcu_uart1 interface.

The internal clock frequency feeded into the UART IP is
96 MHz instead of 48 MHz, which is different to the AM62x.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Daniel Schultz 59de472dab dts: arm: ti: am62x_m4: Use DT_FREQ_x fpr frequenies
We define two frequencies in the am62x_m4.dtsi file.

Use DT_FREQ_M for both frequency to make them more
human-readable and easier to understand.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Dominik Ermel a14c69a52a dts/bindings/flash_simulator: Restrict erase-value
The commit restricts erase-value to either 0xff or 0x00.
On program-erase type devices writes can only change from
erase value of bit to opposite, ease usually consists of two
operations which is programming the opposite value to every bit
of erase range and then turning back all bits to the "erase-value";
above makes it impossible to have erase value of device to be other
than 0xff or 0x00.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2024-04-24 19:42:44 +00:00
Erwan Gouriou a6f94f65a0 dts: stm32h5: Add SDMMC nodes
Add sdmmc1 and sdmmc2 nodes descriptions for STM32H5 SoCs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-04-24 19:41:09 +00:00
Alvis Sun c6763bd2ca drivers: i3c: npcx: introduce NPCX I3C driver
This implements basic driver to utilize the I3C IP block
on NPCX.

1. I3C mode: Main controller mode only.
2. Transfer: Support SDR only.
3. IBI: Support Hot-Join, IBI(MDB).
   Controller request is not supported.
4. Support 3 I3C modules:
   I3C1(3.3V), I3C2(1.8V, espi mode), (I3C3 1.8V or 3.3V)

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-04-24 19:40:28 +00:00
Alvis Sun 18f6a541f2 dts: arm: nuvoton: add I3C device nodes
Add I3C device nodes.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-04-24 19:40:28 +00:00
Ruibin Chang 1d74cb74d9 drivers/crypto/crypto_it8xxx2_sha_v2.c: implement sha v2 for it82xx2 series
Implement a new version crypto_it8xxx2_sha_v2 driver for it82xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-04-24 09:55:46 +02:00
Ruibin Chang a3f0ae9b0f dts/riscv/ite/dtsi: separate sha0 node
Chip it82xx2 series change the HW sha module and it82xx2 series
can't use original sha driver anymore, so move sha0 node from
it8xxx2 to it81xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-04-24 09:55:46 +02:00
Fabio Baltieri 4a5fa01694 input: add a paw32xx driver
Add a driver for PAW32xx sensors.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-04-23 22:13:51 +00:00
Emilio Benavente 13735ff789 dts: arm: nxp: nxp_mcxn94x: updated dts for CTimer
Updated dts for MCXN94x with support for CTimer.

Signed-off-by: William Tang <william.tang@nxp.com>
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-04-23 21:25:38 +00:00
Laurentiu Mihalcea 799a456c25 nxp: imx8ulp: add audio-related nodes
Add DTS nodes for the IPs used in audio processing.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-23 15:36:01 +02:00
Nazar Palamar 62e6fbb9d8 board: cy8cproto_062_4343w: Enable HW Flow control for HCI H4
HW Flow control must be enabled for HCI H4 UART communication.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-04-23 15:35:53 +02:00
Marcin Szymczyk 2d52882647 dts: riscv: nordic: enable CLIC nodes
Interrupt controller driver requires those nodes to be enabled.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-04-23 15:35:12 +02:00
Najumon B.A 93421cefa8 board: x86: add acpi hid for gpio
add acpi hardware id for gpio driver

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-04-22 06:50:38 -07:00
Najumon B.A 4a973db3d4 drivers: gpio: gpio_intel: add acpi base resource enumeration
add gpio_intel driver with acpi based resource enumeration support.
Also updated test cases overlay with new dts entires.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-04-22 06:50:38 -07:00
Jan Kubiznak 030a8b1830 drivers: dac: dac_ad569x: Support for AD569x DACs.
Added support for Analog Devices AD5691 / AD5692 / AD5693 DACs.

Signed-off-by: Jan Kubiznak <jan.kubiznak@deveritec.com>
2024-04-22 06:50:01 -07:00
Wei-Tai Lee e22e2263b4 dts: bindings: add andestech,l2c
To descibe the AndesTech L2 cache. Besides, remove
redundant property in dtsi.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-04-22 09:19:27 -04:00
Kai Vehmanen 45205f865e dts: xtensa: intel_adsp_ace20: correct SSP definition
The ace20 description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Kai Vehmanen aecf19c3c1 dts: xtensa: intel_adsp_ace15: correct SSP definition
The ace15 description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Kai Vehmanen bc63835ba2 dts: xtensa: intel_adsp_cavs25_tgph: correct SSP definition
The tgph description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Daniel DeGrasse e396923198 dts: bindings: mipi-dbi: fix language describing mipi dbi modes
Update language describing mipi dbi modes to be more clear, removing a
run-on sentence

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-20 13:44:07 -04:00
Manuel Argüelles 5d2670ac1f drivers: pwm: mcux_ftm: allow to select clock source
FTM internal counter can be clocked by one of three clock sources
independent of the module bus clock. This patch introduces a DT property
to perform the clock selection from DT.

DT sources are updated to keep the current clock selection for all boards,
with exception of ucans32k1sic board which is migrated to use system
clock by default, as this seems to be a better choice for most cases.
Some PWM LED samples require slower clock so overlays are added for
those cases.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-04-19 10:08:53 +02:00
Manuel Argüelles 445110b306 dts: arm: nxp: s32k1xx: fix RTC clock source
Set RTC clock source to the internal 32 KHz LPO. Currently RTC clock is
used to source RTC counter and FTM counter.

Fixes #71289

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-04-19 10:08:53 +02:00
Steve Boylan 5b72665c47 drivers: spi: Add support for half-duplex (3-wire) SPI
Add support for half-duplex (3-wire) SPI operation using the Raspberry
Pi Pico PIO.  To allow control of the size of the driver, including
half-duplex support is optional, under the control of Kconfig options.

The original PIO source code is also included as a reference.

Corrected 3-wire tx/rx counts.

Enable half-duplex code based on DTS configuration

Replace runtime checks with static BUILD_ASSERT()

Remove too-fussy Kconfig options

Removed PIO source per review request

Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
2024-04-18 08:09:15 -07:00
Franciszek Zdobylak f0f897da4a dts: sifive: Update SoC compats
Update compatible strings to make them consistent across SiFive SoCs.

Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
2024-04-18 14:56:00 +02:00
Declan Snyder 537d5c310c dts: nxp: Convert ENET DT default to new binding.
Convert all of the NXP SOCs with ENET to use the new
binding scheme, which is used by the new driver.

Convert any boards using this SOC to the new scheme as well,
and remove from the documentation the bit about the experimental
nature of the new driver and the overlay that shall no longer exist.

Some of the boards I do not have the hardware of, so apologies
if something breaks, as I have no way to know. All the boards
were made sure to at least build.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-18 11:18:31 +02:00
Declan Snyder ac58f3abe6 drivers: nxp_enet: Generate MAC using eth.h
The MAC address macros are ridiculous in this driver.
Rewrite to be simpler and use eth.h common function.
Also, clarify the mac address generation on the DT overlays.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-18 11:18:31 +02:00
Zhaoxiang Jin a30695b711 dts: nxp: Add LPADC clocks properities to SoC dtsi
Add LPADC clock properties to SoC dtsi on adc/lpadc node

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-04-18 11:16:45 +02:00
Eran Gal e58dfac374 drivers: dac: Add TI DACx0501 driver
Adds a DAC driver for Texas Instruments DACx0501 family of devices

Signed-off-by: Eran Gal <erang@google.com>
Co-authored-by: Martin Jäger <17674105+martinjaeger@users.noreply.github.com>
2024-04-17 14:37:21 +02:00
Grzegorz Swiderski 163cacbe4b dts: nordic: nrf54h20: Add SysCtrl VEVIF node
Add a VEVIF node to be used for communicating with SysCtrl (cpusys).
This is the only part of the SysCtrl VPR exposed to local domains.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-17 14:36:12 +02:00
Daniel DeGrasse 7477636f0f drivers: mipi_dbi: allow MIPI mode to be set via devicetree
Enable MIPI mode to be set via devicetree, for displays that support
multiple MIPI DBI modes. This commit also adds new helpers for displays
that allow drivers to initialize the entire MIPI DBI configuration
structure from devicetree

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-17 14:30:05 +02:00
Tianshuang Ke 8ffefab29f dts: arm: st: Fix incorrect memory mapping and size for STM32L475Xe
This commit updates the SRAM configuration in the STM32L475 device tree:

- `sram0` size reduced from 128K to 96K.
- `sram1` added with 32K.

These changes correct memory settings to prevent initialization failures.

Signed-off-by: Tianshuang Ke <qinyun575@gmail.com>
2024-04-17 14:29:22 +02:00
Jakub Zymelka bce52c8057 dts: add nRF54L15 FLPR core
Add nRF54L15 FLPR core support.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-04-16 18:36:58 +01:00
Jun Lin 011b730b4c driver: reset: npcx: add driver support for reset controller
Nuvoton NPCX chips have reset registers which allow to reset the
peripheral hardware modules. This commit adds the support by
implementing the reset driver. Note that only the reset_line_toggle API
is supported because of the nature of the reset controller's design.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-04-16 09:09:13 +02:00
Tim Lin 36f1092ed7 ITE: dts: it82xx2: Add missing extend setting of alternate function
If I2C3 switches from GPH1/GPH2 to GPB2/GPB5, extend setting
is required.

Test: Accessing I2C is normal if I2C2, I2C3, I2C5 are switched.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-04-16 09:05:38 +02:00
Caleb Perkinson 2fc42054a5 doc: correct sparkfun,serlcd.yaml
yaml file did not match device tree bindings.

Signed-off-by: Caleb Perkinson <calebperkinson@gmail.com>
2024-04-14 15:39:34 -07:00
Mahesh Mahadevan e37d1a5489 dts: nxp_mcxn94x: Add DMA channels for FlexComm nodes
Copy the DMA channel information to both UART and SPI
instances of the Flexcomm as only one of them can be
active.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-04-13 07:03:55 -04:00
Emilio Benavente d2bfed764c dts: arm: nxp: nxp_mcxn94x: Add PWM Support
Added the dts node for FlexPWM Support.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-04-12 16:53:03 -04:00
Laurentiu Mihalcea 94d156c9c8 nxp: imx8ulp: enable serial interface
Enable serial interface on i.MX8ULP.

This also includes a SHA update for hal_nxp which
pulls in the following commits relevant to Zephyr:

* 3366f234ed47 build: hal_nxp: add TPM counter support
* 6544455fcf46 Compile in PXP driver if LVGL is set to use
PXP.
* 31463a848bcd devices: MIMX8UD7: add definition for
LPUART_RX_TX_IRQS

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-12 16:52:38 -04:00
Ederson de Souza eeebb4d911 kernel: Device deferred initialization
Currently, all devices are initialized at boot time (following their
level and priority order). This patch introduces deferred
initialization: by setting the property `zephyr,deferred-init` on a
device on the devicetree, Zephyr will not initialized the device.

To initialize such devices, one has to call `device_init()`.

Deferred initialization is done by grouping all deferred devices on a
different ELF section. In this way, there's no need to consume more
memory to keep track of deferred devices. When `device_init()` is
called, Zephyr will scan the deferred devices section and call the
initialization function for the matching device. As this scanning is
done only during deferred device initialization, its cost should be
bearable.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2024-04-11 15:50:44 -04:00
Krzysztof Chruściński 8acc6a961a dts: common: nordic: nrf54: Add rx-delay property to SPI
Add rx-delay property to all SPI nodes.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-04-11 14:30:41 +02:00
Daniel DeGrasse 821ae15744 dts: arm: nxp_rw6xx: add USBOTG devicetree node
Add devicetree node for USBOTG device, the EHCI based USB controller on
the RW6XX.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-11 09:09:00 +02:00
David Leach 00b46686b1 drivers: lpc55s36: Remove deprecated CSS driver
CSS was deprecated from the mcu-sdk. Removing driver from lpc55s36
to clear build error.

This is a temporary patch to remove the build error.

Fixes #69961

Signed-off-by: David Leach <david.leach@nxp.com>
2024-04-10 14:11:34 -04:00
TOKITA Hiroshi e678a6247d drivers: serial: rpi_pico: Migrate to pl011 driver
RaspberryPi Pico's UART can be operated with the pl011 driver.
Replace it with this.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-04-10 10:01:25 +02:00
Tomasz Leman a200dd88d8 dts: xtensa: intel_adsp: Set soft-off state as disabled
Configure the 'soft-off' power state for manual selection only in the
DTS for Intel ADSP ACE 1.5 MTPM and ACE 2.0 LNL platforms.

Changes include:
- Setting 'min-residency-us' to 0 to indicate that the 'soft-off' state
  is not intended for automatic selection by the power management
  policy.
- Adding a 'status' property set to "disabled" to prevent the power
  management policy from using this state during its decision process.

The 'soft-off' state remains available for manual selection by calling
`pm_state_force`. This change ensures that the state can still be used
when explicitly requested by the system or application, providing
flexibility for power management operations.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-04-09 16:58:24 +02:00
Daniel Maslowski 6b495ceda9 dts: jh7110: fix memory definitions
The L2LIM is 2MB in size, see:
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/u74_memory_map.html
Rename it since there are other memory blocks such as the DTIM for the S7.

Signed-off-by: Daniel Maslowski <info@orangecms.org>
2024-04-09 14:20:39 +02:00
Benedikt Schmidt 888d071fe7 drivers: sensor: implement output diagnostics sensor for TLE9104
Implement a sensor for the output diagnostics of the power train
switch TLE9104.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-04-09 11:07:27 +02:00
Benedikt Schmidt 84a40778af drivers: gpio: split up driver for TLE9104 into a MFD
Split up the driver for the power train switch TLE9104 into a
MFD and GPIO.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-04-09 11:07:27 +02:00
Jiafei Pan 21f0d9b3a9 dts: mimx8mn: add gpt counter device nodes
Add dts node for GPT counter.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-09 11:06:24 +02:00
Jiafei Pan f81cf5b61e dts: mimx8mm: add gpt counter device nodes
Add dts node for GPT.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-09 11:06:24 +02:00
Jiafei Pan 212af1f33d dts: mimx8mp: add gpt counter device nodes
Add GPT counter device nodes.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-09 11:06:24 +02:00
Laurentiu Mihalcea 399c2cba65 nxp: imx8ulp: enable pinctrl
This commit enables pinctrl on i.MX8ULP. This includes:
	1) Adding `pinctrl_soc.h` header file.
	2) Adding DTS node for IOMUXC1, which is one of the
	IPs responsible for managing the 8ULP pads.
	3) Adding .dtsi with pin definitions. For now, only
	the LPUART7 pads are added to this file because this
	is going to be the only consummer for now.
	4) Modifying the `pinctrl_imx.c` driver to work for 8ULP.
	5) Enabling the `CONFIG_HAS_MCUX_IOMUXC`, which is a
	dependency of `CONFIG_PINCTRL_IMX`.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-09 11:06:14 +02:00
Nikodem Kastelik 0401d063fa dts: nordic: add PWM instances for nRF54 Series
Add definitions of PWM peripheral instances so it can be utilized
on nRF54H20 and nRF54L15 devices.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-09 11:05:46 +02:00
Gaetan Perrot 4d5606b55b doc: driver: input: espressif touch_sensor Typo
Example code was incorrect.

Signed-off-by: Gaetan Perrot <gaetanperrotpro@gmail.com>
2024-04-08 18:19:10 -05:00
Nicolas Goualard d9fd292f4b drivers: input: CHSC6X Driver
Added a driver for the CHSC6X chip used on the
Seeed Studio Round Display for Xiao

Signed-off-by: Nicolas Goualard <nicolas.goualard@sfr.fr>
2024-04-08 09:28:36 -04:00
Adam Berlinger 91acd6c1e0 drivers: timer: add support for LPTIM on STM32H5
Added support for LPTIM1/2 for STM32H503 and
LPTIM1 to LPTIM6 for STM32H56x/STM32H57x devices

Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
2024-04-08 15:55:24 +03:00
Adam Berlinger e3c759e835 soc: st: add PM support for STM32H5
Single STOP mode level supported on STM32H5

Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
2024-04-08 15:55:24 +03:00
Daniel DeGrasse 58e78c4af7 dts: bindings: add binding for sitronix ST7796s
Add binding for sitronix ST7796s, a MIPI DBI display controller
supporting up to 320x480 displays at 18 BPP

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-08 09:04:06 +02:00
Chun-Chieh Li 360bc4f1ca drivers: i2c: numaker: support Nuvoton's M2L31 series
Add i2c nodes into soc devicetree

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-04-08 09:03:53 +02:00
Daniel Irekvist c38ea288ee boards: sparkfun: Fix incorrect pro_micro gpio-map
The SparkFun Pro Micro header pins are numbered D1, D0, GND, ... from top
left whereas the SparkFun Pro Micro RP2040 and the Adafruit KB2040 boards
are using gpio 0, 1, GND, ... , so the pro_micro: connector gpio-map of
these boards should reflect that.

Graphical Datasheet for SparkFun Pro Micro RP2040:
https://cdn.sparkfun.com/assets/e/2/7/6/b/ProMicroRP2040_Graphical_Datasheet.pdf

Graphical Datasheet for SparkFun Pro Micro:
https://cdn.sparkfun.com/assets/f/d/8/0/d/ProMicro16MHzv2.pdf

Pinout of the Adafruit KB2040:
https://learn.adafruit.com/assets/106984

Please note that the KB2040 uses CircuitPython pin labels D0, D1 which does
not seemt correspond to the Arduino labels D0 and D1 used by the Pro Micro.

Signed-off-by: Daniel Irekvist <ulmanyar@gmail.com>
2024-04-07 11:12:18 +03:00
Sylvio Alves 561f31bb54 soc: espressif: esp32s3: update to hal_espressif v5.1
Modify and reorganize SoC to meet updated hal.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2024-04-05 13:39:53 +02:00
Gerard Marull-Paretas 17ed60f0b5 dts: nordic: nrf54h20: add ccm030
Add node for CCM030 instance (AES CCM mode encryption).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-04-05 13:19:21 +02:00
Daniel DeGrasse cc3de261aa dts: arm: nxp_rw6xx: add LCDIC node
Add LCDIC devicetree node or RW6xx SOC

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-04 23:59:37 +03:00
Daniel DeGrasse 2ec7a8df3a dts: bindings: add devicetree binding for NXP LCDIC
Add devicetree binding for NXP LCDIC. This controller is capable of
driving displays in 8080 or SPI 3/4 wire mode, and optionally swapping
endianness of display data as it sends it.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-04 23:59:37 +03:00
Emilio Benavente dbd1da973b dts: arm: nxp: nxp_mcxn94x: Added watchdog node
Added the dts node for the
wdt watchdog and updated the
clock frequency.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-04-04 23:58:01 +03:00
Daniel DeGrasse 6b6adc07d0 dts: arm: nxp_mcxn94x: add EDMA channels for LPUART RX and TX
Add EDMA channels for LPUART RX and TX to LPFLEXCOMM 2 and 4, as these
nodes are enabled with the UART driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-04 19:27:28 +02:00
Ilia Kharin 828a0c04a1 drivers: input: pinnacle: add driver for trackpad
The initial version of an input driver for Cirque Pinnacle ASIC supports:
 * Setting sensitivity
 * Choosing between relative and absolute modes
  * Relative mode
   * Primary tap
   * Swapping X and Y
  * Absolute mode
   * Setting number of idle packets
   * Clipping coordinates outside of active range
   * Scaling coordinates
   * Inverting X and Y coordinates

Signed-off-by: Ilia Kharin <akscram@gmail.com>
2024-04-04 09:46:06 +01:00
Kyle Dunn a846b81d58 drivers: sensor: lis2dux12: Add lis2dux12 driver
Adds support for the STMicroelectronics LIS2DUX12 3-axis accelerometer.

Signed-off-by: Kyle Dunn <kdunn926@gmail.com>
2024-04-04 09:45:49 +01:00
Dominik Ermel 326f080131 xtensa: dc233c: Fix build warning in DTS on leading zeros
Leading zeros removed from unit name.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2024-04-03 20:41:45 -04:00
Laurentiu Mihalcea bba8641354 dts: xtensa: nxp_imx8: add ESAI0 node
Add node for NXP's i.MX8QM/i.MX8QXP AUDIO ESAI0 IP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-03 16:18:50 +01:00
Laurentiu Mihalcea bd9b3c67b2 drivers: dai: add driver for NXP's ESAI
This commit introduces a new DAI driver used for NXP's ESAI IP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-03 16:18:50 +01:00
Steve Boylan 1ceceabad5 dts: bindings: i2c: Correct the I2C reset bit
It was RPI_PICO_RESETS_RESET_I2C0, but should be
RPI_PICO_RESETS_RESET_I2C1.

Fixes: #70959

Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
2024-04-03 11:07:05 +01:00
Pieter De Gendt 5944fb38bf dts: arm: nxp: nxp_imx8ml_m7: Add ECSPI instances
Add device tree instances for ECSPI peripherals and update SoC code to
enable clocks.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-04-02 21:03:47 -04:00
Pieter De Gendt fcc729f240 drivers: spi: Support NXP i.MX ECSPI
Add a driver implementation for NXP's Enhanced Configurable SPI.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-04-02 21:03:47 -04:00
Erik Andersson 72503ab386 drivers: display: add driver for frida,nt35510
For now DSI settings are hard-coded for the specific
LCD module used on the STM32H747I Discovery board

Signed-off-by: Erik Andersson <erian747@gmail.com>
2024-04-02 21:03:10 -04:00
Erik Andersson 36e2b40e38 drivers: dsi: stm32: add additional dt options
To support the NT35510 display, some additional
options needs to be configurable in the STM32
DSI peripheral

Signed-off-by: Erik Andersson <erian747@gmail.com>
2024-04-02 21:03:10 -04:00
Declan Snyder 7079ea506a dts: nxp_mcxn94x: Add ENET QOS
Add ENET QOS nodes to MCX DTS

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-02 21:02:25 -04:00
Declan Snyder a7c39a2cc2 dts: bindings: Add NXP ENET QOS Bindings
Add compatibles for NXP ENET QOS drivers

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-02 21:02:25 -04:00
Mahesh Mahadevan 678e65093b dts: nxp_lpi2c: Interrupts is no longer a required property
Some NXP SoC's have a FlexComm interface that manages the
interrupts.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-04-02 21:00:24 -04:00
Laurentiu Mihalcea f4c73105e5 drivers: dai: sai: add pinctrl support
Add support for performing pinctrl operations. For now,
the only supported operation is applying the pinctrl default
state. Pinctrl is left optional to allow for scenarios in which
this is not required (e.g: AMP system in which another
OS configures the pinctrl).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-02 14:31:15 +01:00
cyliang tw 820a70242f drivers: spi: support for Nuvoton numaker m2l31x
Update m2l31x.dtsi for spi support and update spi_numaker.c
for dummy TX data.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-04-02 14:30:57 +01:00
Tim Lin 0967f13c3f ITE: drivers/i2c: Add a property selecting to drive I2C recovery mode
Add a property to select the push-pull GPIO output type to drive the
I2C recovery. The default is open-drain.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-04-02 14:30:48 +01:00
Laurentiu Mihalcea 02f18bc5f5 nxp: imx8ulp: enable clock control
Enable clock control for i.MX8ULP. This consists of:
	1) Adding a PCC node in the DTS
	2) Adding a header file containing the definitions
	of the clocks used by the peripherals to be enabled.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-02 14:30:27 +01:00
Renato Soma da7b65735e drivers: sensors: Add driver for LM35
Add a driver implementation for the LM35 ADC temperature sensor

Signed-off-by: Renato Soma <renatoys08@gmail.com>
2024-04-02 14:29:42 +01:00
Declan Snyder a7988f2986 soc: nxp: lpc55s69: Enable Sleep Mode
Enable sleep mode on LPC55S69 (corresponding to zephyr's runtime idle
mode). Add DT description and power api implementations.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-02 10:38:17 +03:00
Jeppe Odgaard 17b1912bc3 drivers: ad559x: add i2c bus support
Rename ad5592 files in dts, driver and include to ad559x and add support
for I2C bus which is required for AD5593.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-04-01 12:18:47 -05:00
Jeppe Odgaard 2a5dc2a0df drivers: sensor: qdec_stm32: add optional encoder mode
Add support for setting encoder mode in dts.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-04-01 12:10:54 -05:00
Armin Brauns f4c596ae28 drivers: add iis328dq stmemsc driver
Based on the iis2dlpc driver, with some significant differences in
interrupt handling.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-03-29 10:01:37 -05:00
Jakub Michalski 311aa332c8 dts: arm: add nodes to support gpio interrupts in renesas rzt2m
Add common gpio node to pinctrl node (interrupts are shared between ports)
and syscon for interrupt edge detection register in order to support
interrupts in rzt2m gpio

Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
2024-03-29 10:56:55 +01:00
Jakub Michalski 370343a28f dts: bindings: update renesas rzt2m gpio bindings to handle interrupts
Add irqs to rzt2m gpio bindings in order to add interrupt support to rzt2m
gpio driver and adds common gpio node to store interrupt config (irqs are
shared between ports)

Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
2024-03-29 10:56:55 +01:00
Hou Zhiqiang cd8029bf94 dts: imx8mm: add 'rdc' property for UART nodes
Assign the UART devices to both the Cortex-A and Cortex-M cores.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2024-03-28 16:01:30 -05:00
Hou Zhiqiang 0aaab73780 dts: bindings: add a new 'rdc' property to the i.MX IUART bindings
The new property is used to set the access permission for the IUART
device.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2024-03-28 16:01:30 -05:00
Hou Zhiqiang 64dd04f775 dts: imx8m: add device node for RDC
Add RDC device tree node for i.MX8M SoCs Cortex-A core dtsi.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2024-03-28 16:01:30 -05:00
Hou Zhiqiang d81162e0cc dts: bindings: add device tree binding for i.MX RDC
Add device tree binding file for the Resource Domain Controller (RDC)
on i.MX SoCs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2024-03-28 16:01:30 -05:00
Daniel DeGrasse 625f028590 dts: arm: nxp: rw6xx: add DMIC to devicetree
Add DMIC to devicetree for RW61x SOC

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-28 09:44:25 +00:00