Make it run on Qemu only, this test is not intended for HW.
Change-Id: I842d7456f9238221ef5b661749136f4418d5ab16
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There are a number of data sections that are repeated across
all the linker scripts for various architecture. In practice these
don't always get updated and we have had problems with bit-rot.
Consolidate these to make maintenance easier.
x86 linker scripts now follow the same naming convention and we
get rid of a linker-epilog.h that wasn't necessary and whose purpose
has been lost to the mists of time. If applications want to define their
own sections they should be allowed to. Linker scripts for x86 do not
end with .h any more, they are not C header files even though we use
C's preprocessor.
Issue: ZEP-688
Change-Id: I893eb4619969695c1f980efd7c2ec9fa5dad136d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We can derive NUM_REGULAR_IRQ_PRIO_LEVELS by subtracting 1
from CONFIG_IRQ_PRIO_LEVELS if FIRQ is present (which is currently
always the case). If FIRQ is not present, the value will be equal
to CONFIG_IRQ_PRIO_LEVELS since all interrupts will be regular.
Change-Id: Ibefc939e3771bf0adf712127db0d36cb49bf732b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Note that a new section will be created to discuss workqueues,
including the system workqueue.
Change-Id: I921511f117acb07768619418539bef5b6a2a0a72
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The net_buf_unref() API will unref all associated fragments, so it's
wrong to assume that no fragment destroy callbacks would be called
when the head buf is unreffed. Instead the right expectation is that
all fragments get unrefed as well.
Change-Id: I00530e4c1cfa5dddbfcbeab9609347873010ff4d
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
ztest was not working with unified kernel and v1 APIs and not many tests are
using ztest right now, so instead of making it work with old APIs, convert it
to unified kernel completely so that new tests written using ztest would be
unified kenrel based.
Change-Id: Ibfcc7783dcb266abbd388662ba61c4b55d32b10c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
qm_interrupt.h is not needed.
Change-Id: Ia9e62db9fc39ee7a8a36e087eb447cbc4a419817
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Semaphore groups are not supported by the unified kernel (other than
via the legacy APIs).
A select() or poll() type mechanism may be introduced in the future
to provide a more general capability for a thread to wait on multiple
kernel objects simultaneously.
Change-Id: I6cdf773ecb5954bd1b9a5caa9ca5cc29b2932d9a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Adds thread option information. Corrects and enhances information
about the thread's stack area and the spawning of threads.
Change-Id: I881bc448abf0962599eff9c7d32f3760625b3c37
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Fifo section now mentions the existence of this capability, and
notes the associated APIs. (Including an example of using the APIs
is not done, since the amount of code needed to show the creation
of the list of data items is significant, and is likely of little
interest to most users.)
Change-Id: I0485cb7d6a35df48a5eab7f6e7a751ddf403625b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Add a new pwm app (rgb led) using the new API.
Following the recent pwm RFC, all existing APIs will
be deprecated. Two new APIs will be added. The changes
for the new APIs and the required driver function have
been posted.
To demonstrate the usage of the new PWM APIs, this app
to drive a rgb led is added. It will use the new API
pwm_pin_set_usec().
This app will be located in a new sub directory.
Jira: ZEP-745 ZEP-1029
Origin: Original
Change-Id: If8e5d8ab22dcf8b7cf3665e38949715c61ca9c03
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Add a new pwm app (motor control) using the new API.
Following the recent pwm RFC, all existing APIs will
be deprecated. Two new APIs will be added. The changes
for the new APIs and the required driver function have
been posted.
To demonstrate the usage of the new PWM APIs, this app
to drive a servo motor is added. It will use the new
API pwm_pin_set_usec().
This app will be located in a new sub directory.
Jira: ZEP-745 ZEP-1029
Origin: Original
Change-Id: I65857848e64d0478c4e12d1317b2089cdd1ecf5c
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Add a new pwm app (fade led) using the new API.
Following the recent pwm RFC, all existing APIs will
be deprecated. Two new APIs will be added. The changes
for the new APIs and the required driver function have
been posted.
To demonstrate the usage of the new PWM APIs, this app
to fade led is added. It will use the new API pwm_pin_
set_usec().
This app will be located in a new sub directory.
Jira: ZEP-745 ZEP-1029
Change-Id: I8d929a21f7de88307c47b52f98f131e00b2fdbe7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Replace existing APIs which will be deprecated by
the new API in this app and rename the app.
Following the recent pwm RFC, all existing APIs will
be deprecated. Two new APIs will be added. The changes
for the new APIs and the required driver function have
been posted.
Since the two existing APIs (pwm_pin_set_period and
pwm_pin_set_values) used by this app will be deprecated,
this change is to replace them with the new API
pwm_pin_set_usec().
To demonstrate the usage of the new PWM APIs, more apps
will be added. All the apps will be located in their own
sub directories. The existing app is actually one to
blink LED. So, it is moved the "blink_led" sub directory.
Jira: ZEP-745 ZEP-1029
Change-Id: Icc3fbf6b6c25db9590c63bc08f40ec62c87c0f16
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Implement qmsi shim driver based on the new API interfaces.
Recently, a RFC was sent and discussed on the re-design of
PWM interfaces. A API change was already posted.
The API new design will deprecate all existing APIs and three
new APIs will be added. The new APIs are pwm_pin_set_cycles,
pwm_pin_set_usec and pwm_get_cycles_per_sec. Pwm_pin_set_cycles
and pwm_pin_set_usec will rely on two driver functions to set
the period and pulse width. This change is to implement the
driver functions pwm_qmsi_pin_set and pwm_qmsi_get_cycles_per_
sec.
Jira: ZEP-745
Change-Id: I39bb973f8c5b19cb7dbd496d10e7f0b6735efc12
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Re-design the pwm API interfaces. A RFC was sent and discussed
recently on the re-design of PWM APIs.
APIs like pwm_pin_set_values, pwm_pin_set_period, pwm_pin
_set_duty_cycle will be deprecated and replaced by the new
APIs pwm_pin_set_cycles and pwm_pin_set_usec.
A new API pwm_get_cycles_per_sec will be added to get the
clock rate for pwm pins.
The API pwm_pin_set_phase will be deprecated(it always sets
the phase to zero).
The API pwm_pin_configure will be deprecated since it is not
doing anything for most of the platforms or it can be moved
to device init function for the other platforms.
All the pwm_all_xxx APIs will be deprecated. If necessary,
user or an app can set the pins individually.
Jira: ZEP-745
Change-Id: Ie7095df2a67cff08873b59794812ac64ee00c1c2
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Enables boot time timestamps for unified kernel.
Also Splits the source code into microkernel and nanokernel versions
instead of having common code. Not only does this make the code for
each project easier to read, but it also easily allows the nanokernel
version to link against the correct version of main().
Change-Id: Ie0afa2272c3347ebdacc0e3daeebbfe9583fe596
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
Change-Id: I92b543022ae6103683cc9e16b925508fb3cf7db1
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Some minor cleanup and rename of c file to main.c
Change-Id: I8635c9c044f194c5527cd696e9065656403d10c4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
When a serial port spews this, the test case should be mardek failed
inmediately.
Change-Id: Idb45ebce07d1eacc9a75bc6fcafa92939c447f8e
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
FS_FAT_FLASH_DISK_W25QXXDV is a boolean so "" makes no sense.
Change-Id: Ic43529928d80bcd76c2876219990bcec86657d3d
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The flash and RAM disk options are mutually exclusive (evident e.g. in
both defining FS_VOLUME_SIZE and FS_BLOCK_SIZE variables), so they
should really be inside a choice-endchoice block. The duplicated
options can also taken care of with a single definition using
conditional default values.
Change-Id: I87733f0c342166a9e03aa0e1f34390d91107b137
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The convention everywhere else in the tree is to use 'fs' for file
system related code (e.g. subsys/fs and include/fs) so follow this
also for the tests.
Change-Id: I32b9918cbba95e7b219c2d9f3e3a079e664390ab
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The namespace allocated for the filesystem API is fs_* and FS_*. That
means all symbols and defines should adhere to it.
Jira: ZEP-1155
Change-Id: I422310448b7c7c347f621aea6d7b1d97ef25c94d
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Subsystems code will reside in subsys/ folder. This patch creates the
folder and moves FS code there.
Jira: ZEP-1120
Change-Id: If3b1bcb996c5fbd4056cd5d1920d41d29810d6b2
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add a catch all for all architectures for their relevant board
directories so reviews, etc get covered/seen by the arch maintainers as
well.
Change-Id: Ib5a82039d7e8136bb73722df0a5edde0329726e8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Before, the kernel would run the main() function twice; first
as an entry in k_task_list, and then again from _main(). The
_main() invocation would be using a potentially insufficient stack
size.
Now if an MDEF file declares a main() thread, invoke it from
_main(), but honor the desired priority and stack size.
Issue: ZEP-1145
Change-Id: I1abf38fc038e270059589b11d96fae1b3f265208
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
It's important that this configuration stays within the limits of the
Arduino 101 nRF51 (which has only 16kB of RAM, unlike most others that
have 32kB).
Change-Id: I359061f8a41f1373f254c49bff00f551f915bd70
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
For the current purposes it's enough to build these tests only for the
ARM and x86 qemu targets. This also avoids false-positive failures on
platforms that don't have enough memory.
Change-Id: Icbbfc0603feba6bb1ec8a3054f8cdf0800f49ca1
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The combined controller & host build takes up too much RAM for the
16kB arduino_101_ble target, so limit it to the 32kB nRF52 & nRF51
DevKits.
Change-Id: Ib9d04765697b7f5c748633cb6244474d92f96995
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move common config options one level up to try to simplify the per-board
defconfig
Change-Id: I3d80fa494050634d0f877af2015b01b85df20d1d
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change the clock accessors to a tuple of bus ID of the subsystem and enable
bits for the device - it is clearer to read than the opaque pointers.
Change-Id: I9ae73c222c04adac4cf2bc06e97f4ec199bdac3c
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change-Id: Ie8b35c433e96a5e6c840510586c383e31c6912c0
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F401 allows for upto 16 alternate functions on each pin.
Change-Id: Ib1c14fd31abaa2b05a5ab0f7bd1b4a4748f10f84
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Implements MCU-specific GPIO input interrupt integration. Added
definition of System configuration controller as well as its needed by
the GPIO code.
The SYSCFG controller is used for system-specific configuration such as:
- remap the type of memory accessible at address 0x00000000
- manage the external interrupt line connection to GPIOs
- configure the I/O compensation cell
Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
