dts: bindings: clock: Change clock control binding for Renesas RA

Background of this modification is to make clock control
driver code provided by Renesas vendor to support for Renesas MCU
on Zephyr.

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>

soc/renesas/ra/ra6e1/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6E1
 	select CPU_CORTEX_M33
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select ARMV8_M_DSP

soc/renesas/ra/ra6e1/soc.c

@@ -38,6 +38,7 @@ static int renesas_ra6e1_init(void)
 	uint32_t key;
 
 	extern volatile uint16_t g_protect_counters[];
+
 	for (uint32_t i = 0; i < 4; i++) {
 		g_protect_counters[i] = 0;
 	}
@@ -64,7 +65,6 @@ static int renesas_ra6e1_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);
 

soc/renesas/ra/ra6e2/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6E2
 	select CPU_CORTEX_M33
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select ARMV8_M_DSP

soc/renesas/ra/ra6e2/soc.c

@@ -40,6 +40,7 @@ static int renesas_ra6e2_init(void)
 	key = irq_lock();
 
 	extern volatile uint16_t g_protect_counters[];
+
 	for (uint32_t i = 0; i < 4; i++) {
 		g_protect_counters[i] = 0;
 	}
@@ -64,7 +65,6 @@ static int renesas_ra6e2_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);
 

soc/renesas/ra/ra6m1/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6M1
 	select CPU_CORTEX_M4
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select FPU

soc/renesas/ra/ra6m1/soc.c

@@ -41,7 +41,6 @@ static int renesas_ra6m1_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);
 

soc/renesas/ra/ra6m2/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6M2
 	select CPU_CORTEX_M4
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select FPU

soc/renesas/ra/ra6m2/soc.c

@@ -41,7 +41,6 @@ static int renesas_ra6m2_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);
 

soc/renesas/ra/ra6m3/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6M3
 	select CPU_CORTEX_M4
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select FPU

soc/renesas/ra/ra6m3/soc.c

@@ -41,7 +41,6 @@ static int renesas_ra6m3_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);
 

soc/renesas/ra/ra6m5/Kconfig

@@ -6,6 +6,7 @@ config SOC_SERIES_RA6M5
 	select CPU_CORTEX_M33
 	select CPU_HAS_ARM_MPU
 	select HAS_RENESAS_RA_FSP
+	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
 	select CPU_CORTEX_M_HAS_DWT
 	select CPU_HAS_FPU
 	select ARMV8_M_DSP

soc/renesas/ra/ra6m5/soc.c

@@ -40,6 +40,7 @@ static int renesas_ra6m5_init(void)
 	key = irq_lock();
 
 	extern volatile uint16_t g_protect_counters[];
+
 	for (uint32_t i = 0; i < 4; i++) {
 		g_protect_counters[i] = 0;
 	}
@@ -64,7 +65,6 @@ static int renesas_ra6m5_init(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
-	bsp_clock_init();
 
 	irq_unlock(key);