370bd31d2a
Background of this modification is to make clock control driver code provided by Renesas vendor to support for Renesas MCU on Zephyr. Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
50 lines
981 B
C
50 lines
981 B
C
/*
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* Copyright (c) 2024 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief System/hardware module for Renesas RA6M2 family processor
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*/
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <cmsis_core.h>
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#include <zephyr/irq.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
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#include "bsp_cfg.h"
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#include <bsp_api.h>
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uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
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volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run from the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int renesas_ra6m2_init(void)
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{
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uint32_t key;
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key = irq_lock();
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SystemCoreClock = BSP_MOCO_HZ;
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g_protect_pfswe_counter = 0;
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irq_unlock(key);
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return 0;
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}
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SYS_INIT(renesas_ra6m2_init, PRE_KERNEL_1, 0);
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