Jim Shu e3fe63a221 arch: riscv: remove unneeded context switch to gp register ... RISC-V global pointer (GP) register is neither caller nor callee register, and it's a constant value in the single ELF file. Thus, we don't need to save/restore GP at ISR enter/exit. Remove it to optimize context switch performance. Signed-off-by: Jim Shu <cwshu@andestech.com>		2021-08-18 05:18:55 -04:00
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arc	ARC: MWDT: workaround paddr_t defined in both Zephyr and toolchain	2021-08-13 13:43:19 -05:00
arm/aarch32	arch: arm: cortex_r: Move kobject text	2021-08-17 06:06:33 -04:00
arm64	linker: add an initialized DATA_SECTIONS linker location option	2021-08-07 20:26:41 -04:00
common	arch: implement brute force find_lsb_set()	2021-05-07 13:36:22 -04:00
nios2	linker: add an initialized DATA_SECTIONS linker location option	2021-08-07 20:26:41 -04:00
posix	linker: add an initialized DATA_SECTIONS linker location option	2021-08-07 20:26:41 -04:00
riscv	arch: riscv: remove unneeded context switch to gp register	2021-08-18 05:18:55 -04:00
sparc	linker: add an initialized DATA_SECTIONS linker location option	2021-08-07 20:26:41 -04:00
x86	linker: add an initialized DATA_SECTIONS linker location option	2021-08-07 20:26:41 -04:00
xtensa	xtensa: cache: XCC needs to declare variable outside for loop	2021-07-22 15:41:11 +03:00
arch_inlines.h	arm/arm64: Make ARM64 a standalone architecture	2021-03-31 10:34:33 -05:00
cpu.h	arm/arm64: Make ARM64 a standalone architecture	2021-03-31 10:34:33 -05:00
structs.h	kernel: add an architecture specific structs header	2021-04-21 09:03:47 -04:00
syscall.h	arm/arm64: Make ARM64 a standalone architecture	2021-03-31 10:34:33 -05:00