xtensa: cache: XCC needs to declare variable outside for loop
XCC doesn't like that a for loop which declares the loop variable inline. So extract the declaration of the loop variable outside the for loop. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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1 changed files with 6 additions and 3 deletions
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@ -26,8 +26,9 @@ static inline void z_xtensa_cache_flush(void *addr, size_t bytes)
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (size_t line = first; bytes && line < last; line += step) {
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhwb %0, 0" :: "r"(line));
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}
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#endif
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@ -39,8 +40,9 @@ static inline void z_xtensa_cache_flush_inv(void *addr, size_t bytes)
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (size_t line = first; bytes && line < last; line += step) {
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhwbi %0, 0" :: "r"(line));
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}
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#endif
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@ -52,8 +54,9 @@ static inline void z_xtensa_cache_inv(void *addr, size_t bytes)
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (size_t line = first; bytes && line < last; line += step) {
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhi %0, 0" :: "r"(line));
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}
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#endif
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