soc: Remove re-defining some defined types

Removes re-defining some Kconfigs that are already defined
e.g. in arch

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae 2024-11-07 08:31:10 +00:00 committed by Anas Nashif
commit 2f800cea8f
42 changed files with 0 additions and 71 deletions

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@ -7,7 +7,6 @@
if SOC_SERIES_SAMD51
config NUM_IRQS
int
default 137
config ROM_START_OFFSET

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@ -4,11 +4,9 @@
if SOC_BCM2711
config NUM_IRQS
int
default 260
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 54000000
endif

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@ -4,11 +4,9 @@
if SOC_BCM2712
config NUM_IRQS
int
default 280
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 54000000
endif

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@ -6,11 +6,9 @@
if SOC_SERIES_VALKYRIE
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 500000000
endif # SOC_SERIES_VALKYRIE

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@ -4,11 +4,9 @@
if SOC_BCM58402_A72
config NUM_IRQS
int
default 260
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 25000000
endif

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@ -4,11 +4,9 @@
if SOC_BCM58402_M7
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 500000000
endif

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@ -7,11 +7,9 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000
config RISCV_SOC_INTERRUPT_INIT
bool
default y
config NUM_IRQS
int
default 36
config 2ND_LVL_INTR_00_OFFSET

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@ -7,7 +7,6 @@ config SPARC_NWIN
default 31
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 50000000
if FLASH

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@ -6,11 +6,9 @@ if SOC_AGILEX
# must be >= the highest interrupt number used
# - include the UART interrupts 173 or 204
config NUM_IRQS
int
default 205
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 25000000
config KERNEL_VM_SIZE

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@ -6,11 +6,9 @@ if SOC_AGILEX5
# must be >= the highest interrupt number used
# - include the UART interrupts 173 or 274
config NUM_IRQS
int
default 274
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 400000000
config KERNEL_VM_SIZE

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@ -4,11 +4,9 @@
if SOC_CYCLONEV
config NUM_IRQS
int
default 211
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 231250000
endif

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@ -6,7 +6,6 @@
if SOC_NRF52820_QDAA
config NUM_IRQS
int
default 40
endif # SOC_NRF52820_QDAA

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@ -6,7 +6,6 @@
if SOC_NRF52833_QDAA
config NUM_IRQS
int
default 48
endif # SOC_NRF52833_QDAA

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@ -6,7 +6,6 @@
if SOC_NRF52833_QIAA
config NUM_IRQS
int
default 48
endif # SOC_NRF52833_QIAA

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@ -13,11 +13,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 8000000
config PINCTRL_IMX

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@ -7,7 +7,6 @@
if SOC_MIMX8ML8_M7
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 800000000
config GPIO
@ -38,7 +37,6 @@ config FLASH_BASE_ADDRESS
endif # CODE_DDR
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 159

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@ -13,11 +13,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 8000000
config PINCTRL_IMX

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@ -7,7 +7,6 @@
if SOC_MIMX8MM6_M4
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 400000000
config IPM_IMX
@ -15,7 +14,6 @@ config IPM_IMX
depends on IPM
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 127

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@ -13,11 +13,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 8000000
config PINCTRL_IMX

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@ -7,7 +7,6 @@
if SOC_MIMX8MQ6_M4
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 266000000
config PINCTRL_IMX
@ -15,7 +14,6 @@ config PINCTRL_IMX
depends on PINCTRL
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 127

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@ -13,11 +13,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 24000000
config PINCTRL_IMX

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@ -12,11 +12,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 268
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 200000000
endif

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@ -13,11 +13,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 320
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 24000000
endif

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@ -12,11 +12,9 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 230
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 800000000
config CACHE_MANAGEMENT

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@ -95,7 +95,6 @@ if MBEDTLS
# what the ztest_thread_stack defaults to.
#
config TEST_EXTRA_STACK_SIZE
int
default 1024
endif # MBEDTLS

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@ -30,7 +30,6 @@ if MBEDTLS
# what the ztest_thread_stack defaults to.
#
config TEST_EXTRA_STACK_SIZE
int
default 1024
endif # MBEDTLS

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@ -48,7 +48,6 @@ if MBEDTLS
# what the ztest_thread_stack defaults to.
#
config TEST_EXTRA_STACK_SIZE
int
default 1024
endif # MBEDTLS

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@ -7,7 +7,6 @@
if SOC_LS1046A
config NUM_IRQS
int
default 240
config FLASH_SIZE

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@ -7,7 +7,6 @@
if SOC_RK3399
config NUM_IRQS
int
default 240
config FLASH_SIZE

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@ -11,11 +11,9 @@ config FLASH_BASE_ADDRESS
default 0
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 24000000
endif

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@ -5,7 +5,6 @@
if SOC_SERIES_EFM32GG11B
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 68

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@ -4,7 +4,6 @@
if SOC_SERIES_EFM32GG12B
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 68

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@ -4,7 +4,6 @@
if SOC_SERIES_EFR32MG21
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 61

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@ -10,7 +10,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 53

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@ -4,7 +4,6 @@
if SOC_QEMU_ARC
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 10000000
config RGF_NUM_BANKS

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@ -6,7 +6,6 @@
if SOC_STM32F105XC || SOC_STM32F105XB
config NUM_IRQS
int
default 68
endif # SOC_STM32F105XC || STM32F105XB

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@ -6,7 +6,6 @@
if SOC_STM32L152XC
config NUM_IRQS
int
default 57
endif # SOC_STM32L152XC

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@ -6,7 +6,6 @@
if SOC_STM32L152XE
config NUM_IRQS
int
default 57
endif # SOC_STM32L152XE

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@ -4,38 +4,30 @@
if SOC_SERIES_TLSR951X
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 32000
config RISCV_SOC_INTERRUPT_INIT
bool
default y
config RISCV_GP
bool
default y
config NUM_IRQS
int
default 64
config PINCTRL
default y
config XIP
bool
default n
config MAIN_STACK_SIZE
int
default 2048
config IDLE_STACK_SIZE
int
default 1536
config TEST_EXTRA_STACK_SIZE
int
default 1024
config 2ND_LVL_INTR_00_OFFSET

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@ -16,13 +16,11 @@ config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
default 64 if SOC_SERIES_AM6X_M4
default 280 if SOC_SERIES_AM6X_A53
default 512 if SOC_SERIES_AM6X_R5
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 400000000 if SOC_SERIES_AM6X_M4
default 200000000 if SOC_SERIES_AM6X_A53
default 19200000 if SOC_SERIES_AM6X_R5

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@ -4,11 +4,9 @@
if SOC_XENVM
config NUM_IRQS
int
default 500
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 8320000
# We need at least 16M of virtual address space to map memory of Xen node

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@ -8,7 +8,6 @@ if SOC_FAMILY_XILINX_ZYNQ7000
rsource "*/Kconfig.defconfig"
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 96