23264c4b3a
The iMX RT bootrom allows the user to load images into RAM regions from flash by providing a correctly configured boot header. In particular, if the boot header contains a load address within RAM, the bootroom will automatically copy the image to the load address before executing it Introduce CONFIG_NXP_IMX_RT_ROM_RAMLOADER to enable this feature. This Kconfig will shift the LMA of a image built to run in a RAM region to reside in the default FlexSPI boot region, which allows the image to be loaded to the FlexSPI region using west. This is intended to simplify development of applications executing from RAM on iMX RT based systems. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
132 lines
3.5 KiB
Text
132 lines
3.5 KiB
Text
# i.MX RT5XX Series
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# Copyright (c) 2022, NXP
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# SPDX-License-Identifier: Apache-2.0
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choice
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prompt "i.MX RT5XX Series MCU Selection"
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depends on SOC_SERIES_IMX_RT5XX
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config SOC_MIMXRT595S_CM33
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bool "SOC_MIMXRT595S M33"
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select CPU_HAS_ARM_SAU
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select CPU_HAS_ARM_MPU
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select CPU_HAS_FPU
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select PLATFORM_SPECIFIC_INIT
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select ARMV8_M_DSP
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select ARM_TRUSTZONE_M
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select CPU_CORTEX_M_HAS_SYSTICK
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select HAS_MCUX
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select HAS_MCUX_SYSCON
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select HAS_MCUX_FLEXCOMM
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select HAS_MCUX_FLEXSPI
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select HAS_MCUX_CACHE
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select HAS_MCUX_LPC_DMA
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select HAS_MCUX_LPADC
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select HAS_MCUX_OS_TIMER
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select HAS_MCUX_LPC_RTC
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select HAS_MCUX_TRNG
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select HAS_MCUX_SCTIMER
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select HAS_MCUX_USDHC1
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select HAS_MCUX_USDHC2
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select HAS_MCUX_USB_LPCIP3511
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select HAS_MCUX_CTIMER
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endchoice
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if SOC_SERIES_IMX_RT5XX
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config SOC_PART_NUMBER_MIMXRT533SFFOC
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bool
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config SOC_PART_NUMBER_MIMXRT555SFFOC
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bool
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config SOC_PART_NUMBER_MIMXRT595SFFOC
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bool
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config SOC_PART_NUMBER_MIMXRT533SFAWC
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bool
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config SOC_PART_NUMBER_MIMXRT555SFAWC
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bool
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config SOC_PART_NUMBER_MIMXRT595SFAWC
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bool
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config SOC_PART_NUMBER_IMX_RT5XX
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string
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default "MIMXRT533SFAWC" if SOC_PART_NUMBER_MIMXRT533SFAWC
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default "MIMXRT555SFAWC" if SOC_PART_NUMBER_MIMXRT555SFAWC
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default "MIMXRT595SFAWC" if SOC_PART_NUMBER_MIMXRT595SFAWC
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default "MIMXRT533SFFOC" if SOC_PART_NUMBER_MIMXRT533SFFOC
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default "MIMXRT555SFFOC" if SOC_PART_NUMBER_MIMXRT555SFFOC
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default "MIMXRT595SFFOC" if SOC_PART_NUMBER_MIMXRT595SFFOC
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help
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This string holds the full part number of the SoC. It is a hidden
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option that you should not set directly. The part number selection
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choice defines the default value for this string.
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menuconfig NXP_IMX_RT5XX_BOOT_HEADER
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bool "The boot header"
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depends on !BOOTLOADER_MCUBOOT
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help
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Enable data structures required by the boot ROM to boot the
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application from an external flash device.
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if NXP_IMX_RT5XX_BOOT_HEADER
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choice BOOT_DEVICE
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prompt "Boot device selection"
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default BOOT_FLEXSPI_NOR
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config BOOT_FLEXSPI_NOR
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bool "FlexSPI serial NOR"
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endchoice
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config FLASH_CONFIG_OFFSET
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hex "Flash config data offset"
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default 0x400
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help
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The flash config offset provides the boot ROM with the on-board
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flash type and parameters. The boot ROM requires a fixed flash config
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offset for FlexSPI device.
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config IMAGE_VECTOR_TABLE_OFFSET
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hex "Image vector table offset"
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default 0x1000
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help
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The Image Vector Table (IVT) provides the boot ROM with pointers to
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the application entry point and device configuration data. The boot
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ROM requires a fixed IVT offset for each type of boot device.
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config NXP_IMX_RT_ROM_RAMLOADER
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depends on !FLASH_MCUX_FLEXSPI_XIP
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# Required so that debugger will load image to correct offset
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select BUILD_OUTPUT_HEX
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bool "Create output image that IMX RT ROM can load from FlexSPI to ram"
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help
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Builds an output image that the IMX RT BootROM can load from the
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FlexSPI boot device into RAM region. The image will be loaded
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from FLEXSPI0 into the region specified by `zephyr,flash` node.
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# Setup LMA adjustment if using the RAMLOADER feature of ROM
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FLASH_CHOSEN := zephyr,flash
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FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN))
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FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@134000,1)
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config BUILD_OUTPUT_ADJUST_LMA
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default "$(FLEXSPI_BASE) - $(FLASH_BASE)" if NXP_IMX_RT_ROM_RAMLOADER
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endif # NXP_IMX_RT5XX_BOOT_HEADER
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config IMXRT5XX_CODE_CACHE
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bool "Code cache"
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default y
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help
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Enable code cache for FlexSPI region at boot. If this Kconfig is
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cleared, the CACHE64 controller will be disabled during SOC init
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endif # SOC_SERIES_IMX_RT5XX
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