a651862b30
Userspace support for Xtensa architecture using Xtensa MMU. Some considerations: - Syscalls are not inline functions like in other architectures because some compiler issues when using multiple registers to pass parameters to the syscall. So here we have a function call so we can use registers as we need. - TLS is not supported by xcc in xtensa and reading PS register is a privileged instruction. So, we have to use threadptr to know if a thread is an user mode thread. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> Signed-off-by: Daniel Leung <daniel.leung@intel.com>
20 lines
599 B
C
20 lines
599 B
C
/*
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* Copyright (c) 2021 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_ARCH_XTENSA_INCLUDE_OFFSETS_SHORT_ARCH_H_
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#define ZEPHYR_ARCH_XTENSA_INCLUDE_OFFSETS_SHORT_ARCH_H_
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#define _thread_offset_to_flags \
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(___thread_t_arch_OFFSET + ___thread_arch_t_flags_OFFSET)
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#ifdef CONFIG_USERSPACE
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#define _thread_offset_to_psp \
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(___thread_t_arch_OFFSET + ___thread_arch_t_psp_OFFSET)
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#define _thread_offset_to_ptables \
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(___thread_t_arch_OFFSET + ___thread_arch_t_ptables_OFFSET)
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#endif /* CONFIG_USERSPACE */
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#endif /* ZEPHYR_ARCH_XTENSA_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
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