bcf6b27c6b
The original code would (unsurprisingly) only emit handler functions for interrupt levels with interrupts associated with them. But it turns out that it's possible to configure an xtensa device with an empty-but-otherwise-real interrupt level (specifically mt8195 has a "Level 3" interrupt not associated with any input IRQS, it's one level above EXCM_LEVEL and one level below the DEBUG exception). This script is old, and not set up to parse the full core-isa.h directly, so modifying it to detect this condition is difficult. Instead, just emit all 15 possible interrupt handlers, even empty ones. The extra stubs are harmless as they'll be dropped if uncalled. Signed-off-by: Andy Ross <andyross@google.com>
139 lines
4.6 KiB
Python
Executable file
139 lines
4.6 KiB
Python
Executable file
#!/usr/bin/env python3
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import re
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import fileinput
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# Pass an Xtensa core-isa.h file on stdin or the command line, emits a
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# C file on output containing optimized interrupt dispatch routines.
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# FIXME: looking at the assembly generated by the ESP-32 toolchain,
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# this isn't as optimal as I'd hoped. the individual cases are tested
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# using a L32R + BNONE (i.e. a full mask test) instead of a BBSI, and
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# the handlers are being invoked with CALL8 instead of CALL4,
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# inexplicably wasting four words of stack. Maybe this should be
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# emitting assembly instead. Wouldn't be much more complicated and
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# would share all the same structure.
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# My manual count of instructions says that a linear search becomes
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# faster on average when there are three or fewer bits to test. Would
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# be four, if the compiler would generate BBSI instructions.
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MAX_TESTS = 3
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ints_by_lvl = {}
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# print() wrapper that automatically handles indentation levels
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cindent = 0
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def cprint(s):
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global cindent
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if s.endswith(":"):
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print(s)
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return
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if s.find("}") >= 0:
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cindent -= 1
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s = cindent*"\t" + s
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print(s)
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if s.find("{") >= 0:
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cindent += 1
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def emit_int_handler(ints):
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if len(ints) <= MAX_TESTS:
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for i in ints:
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# FIXME: a little work could allow us to extract the
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# handler pointer and argument as literals, saving a few
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# instructions and avoiding the need to link in
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# _sw_isr_table entirely.
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cprint("if (mask & BIT(%d)) {" % i)
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cprint("mask = BIT(%d);" % i)
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cprint("irq = %d;" % i)
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cprint("goto handle_irq;")
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cprint("}")
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else:
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half = int(len(ints)/2)
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m = 0
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for i in ints[0:half]:
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m |= 1 << i
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cprint("if (mask & " + ("0x%x" % (m)) + ") {")
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emit_int_handler(ints[0:half])
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cprint("} else {")
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emit_int_handler(ints[half:])
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cprint("}")
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########################################################################
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# Annoyingly need to join lines and remove #-marked annotations. Some
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# versions of the preprocessor (ahem, esp32 SDK) like to include
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# newlines in the output where the original expressions are expanded
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# from 100% single line macros. Slurp it into a single string and
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# parse via whitespace.
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blob = ""
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for l in fileinput.input():
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l = l if l.find("#") < 0 else l[0:l.find("#")]
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blob += l.rstrip() + " "
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for match in re.finditer(r'__xtensa_int_level_magic__\s+(\d+)\s+(\d+)', blob):
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irq = int(match.group(1))
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lvl = int(match.group(2))
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if lvl not in ints_by_lvl:
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ints_by_lvl[lvl] = []
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ints_by_lvl[lvl].append(irq)
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cprint("/*")
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cprint(" * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.")
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cprint(" *")
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cprint(" * Functions here are designed to produce efficient code to")
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cprint(" * search an Xtensa bitmask of interrupts, inspecting only those bits")
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cprint(" * declared to be associated with a given interrupt level. Each")
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cprint(" * dispatcher will handle exactly one flagged interrupt, in numerical")
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cprint(" * order (low bits first) and will return a mask of that bit that can")
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cprint(" * then be cleared by the calling code. Unrecognized bits for the")
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cprint(" * level will invoke an error handler.")
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cprint(" */")
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cprint("")
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# Re-include the core-isa header and be sure our definitions match, for sanity
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cprint("#include <xtensa/config/core-isa.h>")
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cprint("#include <zephyr/sys/util.h>")
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cprint("#include <zephyr/sw_isr_table.h>")
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cprint("")
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for l in ints_by_lvl:
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for i in ints_by_lvl[l]:
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v = "XCHAL_INT" + str(i) + "_LEVEL"
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cprint("#if !defined(" + v + ") || " + str(v) + " != " + str(l))
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cprint("#error core-isa.h interrupt level does not match dispatcher!")
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cprint("#endif")
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cprint("")
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# Populate all theoretical levels just in case. Odd cores have been
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# seen in the wild with "empty" interrupt levels that exist in the
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# hardware but without any interrupts associated with them. The
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# unused handlers will be ignored if uncalled.
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max = 15
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for lvl in range(0, max+1):
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if not lvl in ints_by_lvl:
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ints_by_lvl[lvl] = []
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# Emit the handlers
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for lvl in ints_by_lvl:
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cprint("static inline int _xtensa_handle_one_int" + str(lvl) + "(unsigned int mask)")
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cprint("{")
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if not ints_by_lvl[lvl]:
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cprint("return 0;")
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cprint("}")
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continue
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cprint("int irq;")
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print("")
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emit_int_handler(sorted(ints_by_lvl[lvl]))
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cprint("return 0;")
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cprint("handle_irq:")
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cprint("_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);")
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cprint("return mask;")
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cprint("}")
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cprint("")
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