d7678f1694
Remove custom implementation and use system cache interface instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
42 lines
1 KiB
C
42 lines
1 KiB
C
/*
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* Copyright (c) 2023 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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#include <zephyr/arch/xtensa/arch.h>
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#include <zephyr/arch/xtensa/cache.h>
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#include <zephyr/kernel/mm.h>
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#include <zephyr/cache.h>
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__weak bool sys_mm_is_phys_addr_in_range(uintptr_t phys)
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{
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bool valid;
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uintptr_t cached = (uintptr_t)sys_cache_cached_ptr_get((void *)phys);
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valid = ((phys >= CONFIG_SRAM_BASE_ADDRESS) &&
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(phys < (CONFIG_SRAM_BASE_ADDRESS + (CONFIG_SRAM_SIZE * 1024UL))));
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valid |= ((cached >= CONFIG_SRAM_BASE_ADDRESS) &&
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(cached < (CONFIG_SRAM_BASE_ADDRESS + (CONFIG_SRAM_SIZE * 1024UL))));
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return valid;
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}
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__weak bool sys_mm_is_virt_addr_in_range(void *virt)
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{
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bool valid;
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uintptr_t addr = (uintptr_t)virt;
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uintptr_t cached = (uintptr_t)sys_cache_cached_ptr_get(virt);
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valid = ((addr >= CONFIG_KERNEL_VM_BASE) &&
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(addr < (CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_SIZE)));
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valid |= ((cached >= CONFIG_KERNEL_VM_BASE) &&
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(cached < (CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_SIZE)));
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return valid;
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}
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