bbe5e1e6eb
Namespaced the generated headers with `zephyr` to prevent potential conflict with other headers. Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH` that is enabled by default. This allows the developers to continue the use of the old include paths for the time being until it is deprecated and eventually removed. The Kconfig will generate a build-time warning message, similar to the `CONFIG_TIMER_RANDOM_GENERATOR`. Updated the includes path of in-tree sources accordingly. Most of the changes here are scripted, check the PR for more info. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
40 lines
1,011 B
C
40 lines
1,011 B
C
/*
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* Copyright (c) 2022 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/irq_offload.h>
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#include <zephyr/zsr.h>
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#include <zephyr/irq.h>
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static struct {
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irq_offload_routine_t fn;
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const void *arg;
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} offload_params[CONFIG_MP_MAX_NUM_CPUS];
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static void irq_offload_isr(const void *param)
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{
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ARG_UNUSED(param);
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uint8_t cpu_id = _current_cpu->id;
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offload_params[cpu_id].fn(offload_params[cpu_id].arg);
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}
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void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
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{
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IRQ_CONNECT(ZSR_IRQ_OFFLOAD_INT, 0, irq_offload_isr, NULL, 0);
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unsigned int intenable, key = arch_irq_lock();
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uint8_t cpu_id = _current_cpu->id;
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offload_params[cpu_id].fn = routine;
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offload_params[cpu_id].arg = parameter;
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__asm__ volatile("rsr %0, INTENABLE" : "=r"(intenable));
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intenable |= BIT(ZSR_IRQ_OFFLOAD_INT);
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__asm__ volatile("wsr %0, INTENABLE; wsr %0, INTSET; rsync"
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:: "r"(intenable), "r"(BIT(ZSR_IRQ_OFFLOAD_INT)));
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arch_irq_unlock(key);
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}
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