30b122b3f0
Print callee-saved registers during fatal error to help with debugging. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
122 lines
3 KiB
C
122 lines
3 KiB
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions
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*
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* This file contains private kernel function/macro definitions and various
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* other definitions for the RISCV processor architecture.
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*/
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#ifndef ZEPHYR_ARCH_RISCV_INCLUDE_KERNEL_ARCH_FUNC_H_
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#define ZEPHYR_ARCH_RISCV_INCLUDE_KERNEL_ARCH_FUNC_H_
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#include <kernel_arch_data.h>
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#include <pmp.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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static ALWAYS_INLINE void arch_kernel_init(void)
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{
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#ifdef CONFIG_THREAD_LOCAL_STORAGE
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__asm__ volatile ("li tp, 0");
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#endif
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#if defined(CONFIG_SMP) || defined(CONFIG_USERSPACE)
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csr_write(mscratch, &_kernel.cpus[0]);
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#endif
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#ifdef CONFIG_SMP
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_kernel.cpus[0].arch.hartid = csr_read(mhartid);
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_kernel.cpus[0].arch.online = true;
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#endif
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#if ((CONFIG_MP_MAX_NUM_CPUS) > 1)
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unsigned int cpu_node_list[] = {
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DT_FOREACH_CHILD_STATUS_OKAY_SEP(DT_PATH(cpus), DT_REG_ADDR, (,))
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};
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unsigned int cpu_num, hart_x;
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for (cpu_num = 1, hart_x = 0; cpu_num < arch_num_cpus(); cpu_num++) {
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if (cpu_node_list[hart_x] == _kernel.cpus[0].arch.hartid) {
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hart_x++;
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}
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_kernel.cpus[cpu_num].arch.hartid = cpu_node_list[hart_x];
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hart_x++;
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}
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#endif
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#ifdef CONFIG_RISCV_PMP
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z_riscv_pmp_init();
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#endif
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}
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static ALWAYS_INLINE void
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arch_switch(void *switch_to, void **switched_from)
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{
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extern void z_riscv_switch(struct k_thread *new, struct k_thread *old);
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struct k_thread *new = switch_to;
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struct k_thread *old = CONTAINER_OF(switched_from, struct k_thread,
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switch_handle);
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#ifdef CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL
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arch_syscall_invoke2((uintptr_t)new, (uintptr_t)old, RV_ECALL_SCHEDULE);
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#else
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z_riscv_switch(new, old);
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#endif
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}
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/* Thin wrapper around z_riscv_fatal_error_csf */
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FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
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const z_arch_esf_t *esf);
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FUNC_NORETURN void z_riscv_fatal_error_csf(unsigned int reason, const z_arch_esf_t *esf,
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const _callee_saved_t *csf);
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static inline bool arch_is_in_isr(void)
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{
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#ifdef CONFIG_SMP
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unsigned int key = arch_irq_lock();
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bool ret = arch_curr_cpu()->nested != 0U;
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arch_irq_unlock(key);
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return ret;
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#else
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return _kernel.cpus[0].nested != 0U;
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#endif
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}
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extern FUNC_NORETURN void z_riscv_userspace_enter(k_thread_entry_t user_entry,
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void *p1, void *p2, void *p3,
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uint32_t stack_end,
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uint32_t stack_start);
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#ifdef CONFIG_IRQ_OFFLOAD
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int z_irq_do_offload(void);
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#endif
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#ifdef CONFIG_FPU_SHARING
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void arch_flush_local_fpu(void);
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void arch_flush_fpu_ipi(unsigned int cpu);
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#endif
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#ifndef CONFIG_MULTITHREADING
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extern FUNC_NORETURN void z_riscv_switch_to_main_no_multithreading(
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k_thread_entry_t main_func, void *p1, void *p2, void *p3);
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#define ARCH_SWITCH_TO_MAIN_NO_MULTITHREADING \
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z_riscv_switch_to_main_no_multithreading
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#endif /* !CONFIG_MULTITHREADING */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_ARCH_RISCV_INCLUDE_KERNEL_ARCH_FUNC_H_ */
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