- Fix lp_gpio Kconfig dependency to use proper
DT_HAS_ESPRESSIF_ESP32_LPGPIO_ENABLED symbol instead of
SOC_ESP32C6_LPCORE, and separate GPIO_ESP32 from LPGPIO_ESP32
- fix lp_gpio compatible string to espressif,esp32-lpgpio to
match the corrected Kconfig dependency
- enable global LP core interrupts at startup via
ulp_lp_core_intr_enable() in lp_core_startup(); the LP core
has no interrupt allocator so this must be done once for any
peripheral using the single interrupt vector
- enable lp_gpio in gpio_wakeup sample overlay
- fix ESP_CONSOLE_UART_NUM default for LP HP UART console
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Correct an #if which otherwise is always true, so we do not
refer to a function which does not exist otherwise.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Use doxygen driver_ops commands to properly document the required/optional
biometrics driver operations
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This PR uses the correct macro that actually set VOS0
(thanks to @pillo79 that got the bottom of the problem discovering
that this is a bug in the STM zephyr driver).
A bug report that explains the problem can be found here:
zephyrproject-rtos#104536.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove pin slot assignment if GPIO pin interrupt is disabled,
otherwise a new interrupt configured while the interrupt is
disabled will cause re-enabling of the original interrupt
to override the slot assigned of the last interrupt configured.
Signed-off-by: Torbjørn Biering Tvermosegaard <tbt@foss.dk>
Add board-specific configuration and Devicetree overlay for the
CY8CPROTO-041TP development board to enable the pwm_gpio_loopback test.
defining the loopback path in the overlay: PWM output on P3.1 and
GPIO input on P3.0.
Signed-off-by: Surya Prakash T <suryat@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Adds the required Devicetree overlay to support the blinky_pwm
sample on the cy8cproto_041tp board, enabling PWM output
and pin configurations.
Signed-off-by: Surya Prakash T <suryat@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Add PWM driver for the Infineon PSoC4 family.
This includes SoC-specific register configurations, API calls,
and hardware instance mapping required for PSoC4 compatibility.
Signed-off-by: Surya Prakash T <suryat@aerlync.com>
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Extends the PSoC 4100T Plus support by adding PWM pinmux definitions
and configuring TCPWM hardware interrupts.
Changes:
- Added comprehensive PWM and complementary PWM pinmux mappings in
psoc4100tp.64-tqfp.dtsi for the 64-TQFP package.
- Defined interrupts (mapping to IRQs 16-21) and priorities for all
six TCPWM instances (tcpwm0_0 to tcpwm0_5) in psoc4100tp.dtsi.
- Add the 'index' property to TCPWM nodes to explicitly define
their hardware instance number
Signed-off-by: Surya Prakash T <suryat@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Add an explicit 'index' property to the TCPWM binding to
represent the hardware index of the TCPWM peripheral.
- This makes the configuration explicit and independent of
Devicetree node ordering.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Add comprehensive Doxygen documentation for all micsr_* and micsr2_*
helper functions that provide atomic indirect CSR access. These
functions are critical for preventing race conditions when accessing
RISC-V indirect CSRs from interrupt contexts.
Signed-off-by: Alexios Lyrakis <alex_gfd@hotmail.com>
Fix race condition in riscv_clic_irq_set_pending() and other CLIC
functions when called from ISR context. The original code used unsafe
two-step CSR operations (MISELECT write followed by MIREG access) that
could be interrupted between steps, leading to incorrect register access.
Replace runtime IS_ENABLED() conditionals with compile-time preprocessor
directives for better code structure and explicit error handling when
platform configuration is incomplete.
Use atomic micsr_* and micsr2_* helpers that perform IRQ-locked indirect
CSR operations, ensuring proper MISELECT/MIREG register pairing.
Changes:
- Convert all CLIC functions to use compile-time ifdef structure
- Replace unsafe CSR operations with atomic micsr_*/micsr2_* helpers
- Use micsr_* (MIREG) for CLIC_INTIP, CLIC_INTCTRL, CLIC_CFG
- Use micsr2_* (MIREG2) for CLIC_INTIE, CLIC_INTATTR
- Add explicit error messages for unsupported configurations
- Fix bit_offset variable scope to avoid redefinition
Signed-off-by: Alexios Lyrakis <alex_gfd@hotmail.com>
Add complete set of micsr2_* helper functions for atomic indirect CSR
access via MIREG2. These complement existing micsr_* helpers that
access via MIREG, providing support for CLIC registers that require
MIREG2 access (CLIC_INTIE, CLIC_INTATTR).
Signed-off-by: Alexios Lyrakis <alex_gfd@hotmail.com>
Add README.rst documentation for the device_pm sample following the
standard Zephyr sample documentation template (doc/templates/sample.tmpl).
Fix incorrect doxygen group names and missing toctree declarations.
Update dummy drivers to use pm_device_driver_init instead of
pm_device_runtime_enable in their init functions. This removes the pre-
main 'suspending..' log messages. Add
CONFIG_PM_DEVICE_RUNTIME_DEFAULT_ENABLE=y to prj.conf so that runtime
PM is actually enabled for the dummy devices. Update sample.yaml
harness regex to match the new output (no pre-main suspending messages).
The README includes:
- zephyr:code-sample directive with relevant PM APIs
- Overview describing parent-child device PM hierarchy
- Requirements section
- Building and Running instructions with zephyr-app-commands directive
- Sample output verified on qemu_x86
- References to Device Runtime PM documentation
Tested by building and running on qemu_x86, confirming the expected
suspend/resume lifecycle output.
Relates to #27805
Signed-off-by: Seyoung Jeong <seyoungjeong@gmail.com>
STANDBY state can place the peripheral into a
low‑power state, and transitioning to it before
a TX transmission completes may cause data loss
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
Upgrades the slab alignment from 4 to 8 so that it will work
on both 32-bit and 64-bit platforms. The fact that it was not
failing prior to this patch falls under happenstance as the
compiler was conveniently aligning the buffer to an even larger
boundary.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
The original slab documentation was written with only 32-bit platforms
in mind. Since then support for 64-bit platforms have been added, but
the documented minimum values for alignment (and block sizes too) had
not been updated. This makes it clear that the minimum alignment
required for 32-bit platforms is 4 bytes, and 8 bytes for 64-bit
platforms.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Changes the loop variable type from 'int' to 'uint32_t' in the
create_free_list() routine to match the type of the 'num_blocks'
field. Otherwise, if a very large number of blocks is specified,
the conversion from 'uint32_t' to 'int' could have resulted in
a negative number. The result of this improper conversion would
be an empty free list.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
- support adc_dt/adc_sequence on frdm_imxrt1186
- enable channel0/1 for adc test
Channel 0: GPIO_AD_15 (ADC1_CH1B) via J51-2
Channel 1: GPIO_AD_16 (ADC1_CH0A) via J51-4, ensure J28 is
in 2-3 position
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add explicit clock configuration and enable calls during driver
initialization.
Note: -ENOSYS is temporarily ignored as not all clock control
drivers currently implement the configure API. This handling
should be removed once all clock drivers support configure.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
This commit adds the Seeed Studio XIAO RP2350 under the same assignees
as other of the Raspberry Pi Pico based boards.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Adds basic support for the "Seeed Studio XIAO RP2350" that comes with
2MB on-board QSPI Flash, a yellow user LED on GP25, UART0 as console,
I2C1 and SPI0 as primjary default serial busses, UART1, I2C0 and SPI1
as secondary serial busses, free access to ADC0 - ADC2, and the
following add-ons:
- support for the digital on-board RGB LED at GP22 over PIO0
with power switch (enable) on GP23 (as fixed regulator)
- support for the on-board battery charging circuit with simple
voltage monitoring of VBAT/2 at ADC3 and gated over a second
power switch on GP19 (as fixed regulator)
- support for the Seeed Studio XIAO pin header
- support for the Seeed Studio XIAO expantion test pads with
additional signals (secondary busses) on the PCB bottom side
Signed-off-by: Stephan Linz <linz@li-pro.net>
Some newer XIAO boards provide additional signals on the bottom side via
testing pads. This adds the new corresponding 'seeed-xioa-pads.yaml' DTS
binding for new nexus node.
Signed-off-by: Stephan Linz <linz@li-pro.net>
The mdio driver is moved into Ethernet driver folder
this change maintainer file to cover the change
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
This commit add phy driver support for Maxlinear GPY111. This driver
implements vendor specific behaviour rgmii delay time setup, which is
not present in the generic MII driver.
Signed-off-by: Nhat Ta <nhat-minh.ta.yn@bp.renesas.com>
Ensure the two BSIM variables BSIM_OUT_PATH and BSIM_COMPONENTS_PATH are
available everywhere also as a cmake variable as quite a few apps use
them. (Some apps try to get them as an environment var, some as a cmake
var).
When the user had them set in the environment, and the BabbleSim module
uses zephyr_get() to try to find them, this also sets them globally.
But otherwise, if we just deduced them in this module, we were only
setting them in the enviroment, so apps which expected them globally
would not build properly.
As bonus, add a cache variable to mark the module as found, so if
find_package(BabbleSim) is called again, we just skip it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Align interface tests with multicast address ref counting changes:
* net_if_ipv6_maddr_add() does not fail now on second attempt, but
rather bumps the ref counter, verify that the address pointer returned
is the same instead.
* Solicited-node addresses won't be added twice, so instead of checking
if second adding attempt fails, check if address already exist
instead.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
