Introduce a new binding for area(s) inside Non-Volatile Memory of STM32
SoCs which can behave like OTP (i.e., can only be programmed once).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
bt_mesh_suspend/resume now only re-enable provisioning bearers that
were previously active.
Adds internal bt_mesh_provisionee_suspend/resume APIs.
bt_mesh_suspend() now return -EBUSY if provisioning is active before any
suspend actions are performed.
Signed-off-by: Stine Åkredalen <stine.akredalen@nordicsemi.no>
- Get unit number and memory size from devicetree
- Renesas RZ/T2L uses at25sf128a flash chip which differs from RZ/T2M
and RZ/N2L supported previously. The Write Status Command may write
incorrect data to Status Register or Configuration Register on this
chip. Remove this code to make the driver common for other SoCs.
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add Doxygen documentation to the battery devicetree bindings header so
that it appears in the generated public documentation.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
guess_image() used **/*{name}*.{ext}, which matched auxiliary images
(e.g. rtl87x2g_evb_a-jlink-wiring.webp, rtl87x2g_evb_a-download-mode.webp)
as well as the main board image.
Add an exact-match pattern **/{name}.{ext} first so the main board image
is always prioritized.
Fixeszephyrproject-rtos/zephyr#104821
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When proc_param->is_unicast_to_broadcast == false we should clear
the broadcast_to_unicast.broadcast_source instead of the
unicast_to_broadcast.broadcast_source.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Set DCACHE_LINE_SIZE and ICACHE_LINE_SIZE configdefaults to 64 bytes
for the APU (Cortex-A) configurations on Versal, Versal2, and
Versalnet SoCs.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Enable CACHE_MANAGEMENT for both RPU and APU configurations
on AMD Versal2 SoC.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
The Kconfig.defconfig file was using incorrect syntax for setting
default configuration values. Lines like "CONFIG_CACHE_MANAGEMENT=y"
are .config/prj.conf fragment syntax, not valid Kconfig language.
This caused the Kconfig parser to silently ignore these lines,
resulting in CACHE_MANAGEMENT not being enabled by default for
VersalNet APU builds.
Fix by using proper Kconfig syntax with "config" block and
"default y" statement. Also remove the duplicate CONFIG_CACHE_MANAGEMENT
line and the redundant ARM_ARCH_TIMER setting which is already enabled
by the top-level Kconfig.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Add a mikroBUS shield definition for the MikroElektronika RS485
Isolator 5 Click board.
The shield instantiates the RS485 transceiver on the mikroBUS UART
with the required DE/RE control pins exposed for Zephyr RS485 use.
Signed-off-by: Bobo Bäck Engström <bobo@id8-engineering.io>
Define mikroBUS connector nodes for socket 1 and socket 2 on
mikroe_clicker_2 and add header aliases.
This board already exposes mikrobus_{1,2}_{spi,i2c,uart}, but lacked a
mikrobus_header-style GPIO mapping node used by click shield overlays
for CS/INT and other control pins.
This keeps compatibility with shields expecting a generic
mikrobus_header while allowing explicit socket selection.
Signed-off-by: Bobo Bäck Engström <bobo@id8-engineering.io>
Add per-board Timing Adapters overlays for Corstone-300/320 and
document applying them via -DDTC_OVERLAY_FILE. Enables modeling of
memory bandwidth/latency on FVP/FPGA; overlays are provided but not
enabled by default.
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
Configure Timing Adapter (TA) child nodes during driver initialization.
This allows running inference with user-configured memory bandwidth and
latency models described in Devicetree.
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
Add binding for the Timing Adapter and document common tuning.
This lets platforms describe TAs in Devicetree to model memory timing
for inference.
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
sys_cache_instr_enable() calls into the Zephyr cache driver
(cache_nrf.c), which is not compiled as part of the TF-M platform
build. When CONFIG_CACHE_MANAGEMENT and CONFIG_ICACHE are both
enabled, this produces an undefined reference at link time.
Use nrf_cache_enable() directly via the nrfx HAL for TF-M builds,
which is already available in the TF-M platform. Zephyr builds are
unaffected and continue to use the driver abstraction.
Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
Add RISC-V APLIC driver split into shared core and MSI-specific
modules following the GICv3/ITS pattern:
- intc_riscv_aplic_priv.h: private header with struct aplic_cfg,
register helpers, and aplic_msi_init() declaration
- intc_riscv_aplic.c: core driver with domain enable, source
configuration, device instantiation; calls aplic_msi_init()
when CONFIG_RISCV_APLIC_MSI is enabled
- intc_riscv_aplic_msi.c: MSI-specific code for APLIC target
routing, GENMSI injection, and MSI address geometry setup
This split allows direct delivery mode support to be added later
without touching MSI code.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add RISCV_APLIC base Kconfig (enabled by DT_HAS_RISCV_APLIC_ENABLED)
and RISCV_APLIC_MSI sub-config that is only available when every APLIC
node in the devicetree has an msi-parent property. This prevents
build failures when APLIC is used in direct delivery mode without an
IMSIC. Update CMakeLists.txt to build intc_riscv_aplic.c for the
base config and intc_riscv_aplic_msi.c for the MSI sub-config.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add public API header for the RISC-V APLIC driver. Provides register
offset and bit-field defines, source configuration helpers, and
function declarations for domain enable, source config/enable, and
MSI routing (guarded by CONFIG_RISCV_APLIC_MSI).
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add devicetree binding for the RISC-V Advanced Platform-Level
Interrupt Controller (APLIC). Uses a single compatible "riscv,aplic"
with an optional msi-parent property: when present the driver operates
in MSI delivery mode, when absent direct delivery mode is assumed.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Remove the required_sec_level for struct bt_iso_chan and
all related automatic security machinery built around it
(iso_chan_connect_security, bt_iso_security_changed,
BT_ISO_STATE_ENCRYPT_PENDING and the CONFIG_BT_SMP checks
in iso.c)
Applications can just call bt_conn_set_security() on the
ACL connection before bt_iso_chan_connect() instead.
Fixes#104751
Signed-off-by: Vedant Malkar <vedantitsme@gmail.com>
The UUID library has been present as an experimental library in
the Zephyr code base since v4.2.
Since no need for major API changes has emerged in the last two
Zephyr version the library can be safely promoted to unstable.
Signed-off-by: Simone Orru <simone.orru@secomind.com>
Add CAN FD support for MCXW71 and MCXW72, where FlexCAN has been
supported but CAN FD feature has not been supported yet.
Signed-off-by: William Tang <william.tang@nxp.com>
Add CAN FD support for MCXE31x, where FlexCAN has been supported
but CAN FD feature has not been supported yet.
Signed-off-by: William Tang <william.tang@nxp.com>
Add CAN FD support for MCXA156, where FlexCAN has been supported
but CAN FD feature has not been supported yet.
Signed-off-by: William Tang <william.tang@nxp.com>
Add initial TF-M support for MCXA577 target
- refactor the device tree configs
- added ns_decofnig and yml files
- added non secure dts for the MCXA577 SOC
- added ns memory slot and configs
Signed-off-by: Waqar Tahir <waqar.tahir@nxp.com>
Add a test case to verify that adding a device to a power domain
twice returns -EALREADY on the second attempt, ensuring the duplicate
insertion prevention logic works correctly. Also, verify that removing
a device from a power domain twice returns -ENOENT on the second
attempt, ensuring the duplicate removal prevention logic works correctly.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
It turns out that power_domain_add_or_remove() when add==true only
looks for DEVICE_HANDLE_NULL empty slots to write to, and never checks
"whether this dev_handle is already in the supported handles or not".
The result is: repeated adds may insert duplicate entries; or when
there are no empty slots, even though it's "already in the domain",
it returns -ENOSPC (which conflicts with the documented semantics).
This commit adds a check: when add==true and rv[i] == dev_handle is
found, it returns -EALREADY and avoids duplicate insertion.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
