Clear rx_dma_params.buf to NULL in mcux_lpuart_rx_disable() after
releasing all buffers. Without this, the stale pointer remains set
after RX teardown, which can cause subsequent checks against buf
to incorrectly assume RX is still active.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
Add static inline helper functions for reading or writing primitive values
from or to NVMEM cells.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Changes .dts file of APARD32690 to only include generic definitions.
Creates revD and revE overlay files.
Previous apard32690_max32690_m4.dts correctly described revD.
revE and revD have swapped functionalities for SPI3 and SPI4.
As SPI4 had the label "pmod_spi" assigned in revD, this label
needs to go to SPI3 in revE. If the goal was to keep the dts
file unchanged, this would imply deleting the SPI4 node and
recreating it in the revE overlay. Thus it was considered
better to only keep the revision-agnostic nodes in the dts
and create separate revD and revE overlays for the two nodes
with swapped functionalities.
Signed-off-by: Raluca Bozdog <raluca.bozdog@analog.com>
Add all device nodes for flexcan on i.MX 95 A55 platform.
Signed-off-by: Jianchao Wang <Jianchao.wang_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Fix inconsistencies in Doxygen-related preprocessor guards in i2c.h.
Remove the DOXYGEN guard from CONFIG_I2C_RTIO, since the
block is placed inside a hidden block.
Add DOXYGEN to CONFIG_I2C_TARGET_BUFFER_MODE guards so that
buffer mode APIs are included in generated documentation, which
was previously missing.
Signed-off-by: Martin Meyer <meyer.m90@gmail.com>
To avoid these test from timing out in slow CI runners let's increase
their timeout.
This does not affect the test themselves in any way.
This timeout is a watchdog that kills the test in case it hangs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
To avoid these test from timing out in slow CI runners let's increase
their timeout.
This does not affect the test themselves in any way.
This timeout is a watchdog that kills the test in case it hangs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
To avoid these test from timing out in slow CI runners let's increase
their timeout.
This does not affect the test themselves in any way.
This timeout is a watchdog that kills the test in case it hangs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add lauracarlesso as a collaborator for Infineon Platform and
hal_infineon west project. The user has been working on the
Infineon Zephyr integration team contributing driver and SOC
updates for new devices and maintenance of existing devices.
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Introduces a new section in the Doxygen documentation detailing
guidelines for documenting drivers' backend API, and how to use the
corresponding Doxygen aliases.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Cursor:auto
Remove hardcoded board details from DAC loopback test, in favor of
specifying channels in board overlays.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Remove hardcoded board details from DAC API test, in favor of specifying
channels in board overlays.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Properly declare the io-channel-cells for the samd5x DAC binding for use
with the DAC DT spec helpers.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Properly set #io-channel-cells = <1> for the NXP GAU DAC driver, which does
in fact support output channel binding.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add bare and DT helper functions for converting milli-/micro- values to raw
DAC values based on the resolution of the channel.
Bump the DAC API to version 1.1.0 to encapsulate DT helper and conversion
API additions.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add the ability to specify channel details in devicetree, and enhance the
DAC API to support a new struct dac_dt_spec with corresponding DT helper
functions:
- dac_channel_setup_dt
- dac_write_value_dt
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add a new test suite to verify the accessibility of the ROM functions and
data across different configurations and chips (RP2040 and RP235x).
Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
Add the MPU entry representing ROM region.
This configuration is incompatible with
`CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU`. The first 32 bytes
of ROM contains some read-only data used by certain ROM functions.
Enabling this can break some ROM functions.
Refer to: https://github.com/raspberrypi/pico-bootrom-rp2350
Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
Add the MPU entry representing ROM region.
This configuration is incompatible with
`CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU`. The first 256 bytes
of ROM contains some read-only data used by certain ROM functions.
Enabling this can break some ROM functions.
Refer to: https://github.com/raspberrypi/pico-bootrom-rp2040
Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
Add board overlay and conf files for the CY8CKIT-041S-MAX board
across the flash common, erase_blocks, interface_test, and
negative_tests test suites. The overlays define a storage/slot1
partition at offset 0x10000 within flash0.
The PSOC4 write_block_size of 256 requires
CONFIG_FLASH_FILL_BUFFER_SIZE=256 for tests that use flash_fill.
Add the conf file for negative_tests for both cy8ckit_041s_max and
cy8cproto_041tp, as the latter was also missing it.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Add the flash controller node to the psoc4100smax SoC DTSI, wrapping
the existing flash0 node as a child of the controller. This mirrors
the structure already present in psoc4100tp.dtsi.
The flash controller is at CPUSS_BASE + 4 (0x40100004), with register
size 0x104, matching the psoc4100tp. The write-block-size and
erase-block-size are both 256 bytes, confirmed by
CPUSS_SPCIF_FLASH_PAGE_SIZE=3 in the HAL device config header.
This enables the FLASH_INFINEON_PSOC4 Kconfig option for boards
using the psoc4100smax SoC, such as the CY8CKIT-041S-MAX.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
The PSOC4 flash driver accepted unaligned write offsets and sizes,
using a read-modify-write path to handle sub-row writes. This
violated the flash API contract, as the driver advertises
write_block_size=256 via devicetree.
Additionally, the Infineon HAL function Cy_Flash_WriteRow() requires
row-aligned addresses and exactly CY_FLASH_SIZEOF_ROW bytes of data.
The R-M-W path was passing unaligned addresses to the HAL, which
would reject them, but the driver was not checking the return value
and silently reported success after failed writes.
Add write alignment validation for both offset and size. Remove the
dead read-modify-write code path. Add missing error checking on
Cy_Flash_WriteRow() return value in the write loop, consistent with
the erase function.
Handle caller-provided data buffers that are not 4-byte aligned by
staging each row through a local aligned buffer before calling
Cy_Flash_WriteRow(), which requires a uint32_t-aligned source
pointer. When the source is already aligned, it is passed directly
with no copy overhead.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Adds documentation for ztest benchmark framework in the developer docs.
This includes:
- Overview of the ztest benchmark framework
- Instructions on how to define benchmarks
- Explanation of zbench output & how to interpret it
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Add a sample demonstrating the new benchmarking framework.
The sample shows how to define suites, simple & timed benchmarks, and
benchmarks with setup/teardown functions.
Verified on qemu_x86 and nrf5340dk.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Currently, ztest is primarily focused on unit testing. This commit
introduces a framework designed specifically for performance analysis.
Key features:
- Standardized API: ZBENCH_SUITE and ZBENCH macros.
- Low overhead: Uses Welford's online algorithm for statistics
to keep memory footprint minimal.
- Hardware agnostic: Built on top of <zephyr/timing/timing.h>.
- Clear output: Provides formatted console tables of results.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Wrap the picotool sign command (requires recent picotool) to build
signed ELF files (which can be later converted to UF2 as well).
The resulting files boot, yet this has not been tested with actual
Secure Boot yet.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
The way that ASCS registers and unregisters for the ASCS
unittests does not work properly with UUIDs and local variables.
Hotfix is to use a `static` backup instead of a stack-allocated
backup. A proper fix will be provided later.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
remove redundant net_pkt_set_iface() it is already set in
net_recv_data() and net_pkt_rx_alloc_with_buffer().
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
- Adds a board image for the cy8cproto_041tp board.
- Adds a section linking to board documentation.
- Corrections to naming and features list.
- Moves board docs into the correct `doc` directory for both
cy8cproto_041tp and cy8cproto_041s_max boards.
Signed-off-by: John Batch <john.batch@infineon.com>
- monitor_serial() opens handler.log in binary mode (\"wb\") and writes
re-encoded bytes. When the runner (e.g. linkserver for frdm-mcxn947)
produces serial output that is not cleanly decodable as UTF-8, the
decode('utf-8', 'ignore') silently drops bytes and the resulting
handler.log is unreadable.
- Fix by opening handler.log in text mode with explicit UTF-8 encoding,
consistent with BinaryHandler.handle_serial() which uses open(\"w\").
Change the decode error handler from 'ignore' to 'replace' so
corruption becomes visible as replacement characters rather than
silently dropped bytes.
Signed-off-by: Jjateen Gundesha <jjateen97@gmail.com>
The previous 40 KB default heap was at the edge for the Wi-Fi driver,
which can lead to allocation failures. Increase to 50 KB to provide
adequate memory for Wi-Fi operation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add ESP32-C5 test overlays for counter, I2S, PWM loopback, retained
memory, and UART async API tests.
The PWM GPIO loopback test requires SKIP_EDGE_NUM=6 on ESP32-C5 to
account for flash cache loading latency on the first GPIO ISR
invocations that skews edge timing measurements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add ESP32-C5 overlays and configurations for deep sleep, counter
alarm, Wi-Fi shell, LED strip, and ULP LP core samples.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add board definition for the ESP32-C5-DevKitC-1 development board
based on the ESP32-C5-WROOM-1 module (8 MB flash, 4 MB PSRAM).
Includes HP Core and LP Core configurations, pinctrl, devicetree,
and OpenOCD debug support.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Extend the ESP32 Wi-Fi driver to support ESP32-C5, the first
Espressif SoC with dual-band Wi-Fi 6 (2.4 GHz and 5 GHz).
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
