On STM boards without an FPU (like nucleo_f091rc) the WWDG driver
requires 4K more of flash than the IWDG due to the use of floating
point math. Fixed it by refactoring to use integer math.
Reduced sample build ROM size from 24848 B to 21620 B on
nucleo_f091rc.
Signed-off-by: James Torres <jamesktorres2022@gmail.com>
Updated in-system profiling for CPU usage with on target
measurements and added assertion checks.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Set correct MPU memory type and size for the uniqe device id, package code
and ADC VREF/TS calibration read-only flash region.
REGION_IO_ATTR configures the MPU region to device-memory with RW access,
which is also used for the PERIPH region. To avoid complicating things
unnecessarily, we use this type instead of defining a new device-RO.
The size is reduced to 512 bytes, because RM0477 table 28 and chapter
5.3.12 state that this read-only flash area has a size of 512 bytes.
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
Refer to the M5Stack official code, it need to correct
the value of x-offset of st7789v display driver from 53 to 52,
or the leftmost column of the LCD shows an anomaly.
Signed-off-by: Xianglong Zhang <zhangxianglong@cvte.com>
This ensure people browsing the JSON doc page will see a few more
options in terms of code samples exercising JSON API
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
As described in this issue:
https://github.com/zephyrproject-rtos/sdk-ng/issues/1038
`-flto=auto` fails on some (slower) Windows machines due to an issue with
the Zephyr SDK's GCC toolchain for Windows.
In order to allow users to work around this issue, introduce a new
CONFIG_LTO_SINGLE_THREADED option that switches to `-flto=1`, which
enforces a single thread when processing LTO.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Adds four new test cases to validate the PMP stack guard protection when
`CONFIG_PMP_NO_LOCK_GLOBAL` is enabled (i.e., when PMP entries are not
globally locked).
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Adds the Kconfig option PMP_NO_LOCK_GLOBAL to remove the PMP Lock bit
usage. The global entry is an internal detail of the driver
implementation and should not be reflected in the user interface. This
allows the application to dynamically reconfigure the PMP entries
without requiring hard reset. This is essential for firmware that
performs an RO-to-RW jump. By keeping these system entries unlocked,
higher-privileged M-mode code can dynamically reconfigure memory
permissions during the secure handover process, which is not possible if
the entries are permanently locked during early boot.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Verify that the interface index, converted to array index,
does not exceed the preallocated string array for dynamic index
completion.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
As explained in the comment in the code, both structs have the same
offsets for it's fields, but sockaddr_in is smaller, hence it can
confuse static analyzer, giving warnings about potential out-of-bound
access. Therefore, cast to sockaddr_in6 instead to avoid the warning.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This change aligns sample rates to the datasheet and removes
non existing values for 11.025kHz, 22.05kHz, & 44.1kHz
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Completes the STM32 overlays:
- Adds missing timers
- Adds copyright notice
- Adds okay to timer instances so that shared interrupts can be enabled
if needed
- Adds an overlay for STM32H7R/S
- Removes the conf file for N6 that is useless now that userspace works.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For some STM32 series, some interrupts are shared between different timer
instances. Use the SHARED_INTERRUPTS for these series so that all timers
can be used at the same time.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Counter driver was not functional with STM32 advanced timers (like
TIMER1/8) due to them having more than one interrupt line.
This commit defines the proper interrupts for the advanced timers so that
they can be used as counters.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit updates the CI workflows to use the CI image v0.28.7, which
updates versions of the following components:
- Doxygen 1.15.0.
- Renode 1.16.0.
- BSIM 3.0.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Sphinx has a built-in `:rfc:` role for referencing RFC documents.
This commit updates documentation pages referencing RFCs to use this role.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
After we found the target GPIO port and configured I/O retention on target
wake-up pin, break from the search loop.
Applies only to STM32WBA series.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The rank cannot be notified and the function allowed for
just updated to the rank. The CSIS spec does not mention
the usecase, nor support, for changing the rank of a device.
The spec only seems to allow for dynamic changes to the set
size (and only during that can the rank be set).
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Disable cache modeling in FVP and skip a few tests that have not been
working for a while to unblock the running ci on this board.
The tests will be tracked by an issue and fixed later.
Related issue #97602
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Rename the board config to fix ci issue while running samples for
fvp_baser_aemv8r:
```
INFO - 1) sample.net.zperf.async_tx.stm32 on
fvp_baser_aemv8r/fvp_aemv8r_aarch32 error (CMake build failure - CMake
Error at cmake/modules/extensions.cmake:2905 (message): Board
fvp_baser_aemv8r defines multiple SoCs.)
```
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Make sure bindesc are placed right after the vector table and fix ci
failure with sample.bindesc for fvp_baser_aemv8r/fvp_aemv8r_aarch32.
Without this change the bindesc are placed at a location that is not
mapped leading to a data abort while running the sample.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Move ARCH_HAS_STACKWALK under CPU_CORTEX_A section since only Cortex-A
implements arch_stack_walk(), while Cortex-R does not.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Skip running the test scenario `drivers.watchdog` on Arm FVP for the
board `mps2/an385`.
Since the test runs by default on qemu, this issue was missed earlier
when the test was excluded for the other MPS2 variants that use FVP.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Add support for configuring hardware-specific boot feature bitmaps
through Devicetree and software-specific boot configurations through
Kconfig options.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Add new Devicetree properties under the SiWx91x NWP node to describe
hardware-specific boot configuration options.
The properties are documented in the SiWx91x NWP YAML binding.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
DWC2 core automatically clears USBActEP (for all endpoints other than
endpoint 0) on bus reset. While core is deactivating the endpoint, it
does not disarm it.
On bus reset USB stack first calls ep_disable API and then ep_dequeue.
This was leading to endpoint is not active warning followed by endpoint
disable timeout. Disable timeout was effectively caused by waiting for
EPDisbld interrupt on endpoint with disabled interrupts.
Solve the issue by unconditionally disarming endpoint in ep_disable API
handler. Remove the false warning because USBActEP cannot really be used
for sanity checking as it is not only the driver that clears it.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
