Adds mag-gain-correction DT property, which sets the magnetic gain
correction value. Previously a property to select the channel for gain
correction existed, but there was no way to configure the correction
value itself.
Signed-off-by: Marek Maškarinec <marek.maskarinec@hardwario.com>
Add EHCI controller configuration with dual USB instances (USB1/USB2),
device tree bindings, 8 bidirectional endpoints, and UDC workqueue
stack optimization for frdm_imx93 A55 platform.
Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
The original driver is only feasible for M-Core, but for Cortex-A Core,
it need to do MMU mapping to map physical address to virtual address,
to the main update is to add MMIO mapping in this driver, and all the
register access should use virtual address.
Replace direct base address access with DEVICE_MMIO_NAMED_* macros
to provide better memory mapping abstraction and improve platform
portability.
This change:
- Adds DEVICE_MMIO_NAMED_ROM/RAM to config and data structures
- Maps the register base address during driver pre-initialization
- Updates all base address references to use DEVICE_MMIO_NAMED_GET
- Maintains backward compatibility with existing functionality
The DEVICE_MMIO API provides a standardized way to handle memory-mapped
registers across different platforms and memory protection schemes.
Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
Support device tree specified clock rates for USB controller and PHY.
Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
As middleware.cmake could be included by mcux-sdk's CMakeLists.txt,
so use CMAKE_CURRENT_LIST_DIR to make sure the directory is correct.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
Add USB_CLK and USB_PHY_CLK support for NXP EHCI controller on MIMX9352.
Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
If the modem reboots or stops responding to AT commands while in
RUN_DIAL, AWAIT_REGISTERED, or CARRIER_ON, the modem_cellular state
machine could previously dead-end. Applications had to recover by
manually issuing device PM suspend/resume.
This change adds an internal recovery path: after repeated chat/script
failures in the states above, the driver resets the state to INIT, and
posts an immediate RESUME event. This allows the initialization sequence
to run again and restores connectivity, including after unexpected modem
reboots.
No API changes; behavior only differs in failure scenarios.
Signed-off-by: Tomas Gudelevičius <tomas.gudelevicius@draeger.com>
Skips updating files if the output already matches the file
contents, this prevents a random occurance whereby sysbuild
reconfigures itself after a reconfiguration for no known
discernable reason
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Add support for building Trusted Firmware-M (TF-M) non-secure
applications for the STM32H573I-DK board.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
When Ethernet is enabled, `net_config_init_app` function will use the
first found interface that has auto start enabled. In this particular
case, backbone interface will not be able to perform dhcp request
because OpenThread interface gets to be the first interface found
and chose. Openthread will fail this procedure, as it has no
direct connectivity to backbone.
This is why, ethernet app has `CONFIG_IEEE802154_NET_IF_NO_AUTO_START`
set.
In this case, make sure to call net_if_up for OpenThread interface from
border router code when backbone events are triggered.
Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
Currently only TWIM peripheral is verified against TWIS.
Add new test variant to verify nRF52 TWI peripheral as well.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
1) Also build the CRC shell:
Even if we do not runtime test that part, let's at least build it.
Otherwise we do not have any test building it, and it just rots.
2) Do not limit the test to devices with HW CRC acceleration.
The CRC module has a SW version, and it makes sense to test it also.
(we were only build testing the HW support side in CI so far).
3) Limit what we test in integration to one platform for the SW version
and one HW platform.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
To use the shell one does not need anymore to pull unistd.h,
if one uses sys_getopt, we need to include sys/sys_getopt.h
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add Kconfig option to skip or execute the verification of the ic
type. This adds a delay of 100ms to the initialization.
Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
The sensor requires at least 94ms of delay before starting
communication after a reset. This is not mentioned in the
datasheet but is arbitrarily defined.
Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
Several test sources used the misspelled string "Unsupported
configuraiton".
Fix the typo across all affected files to improve clarity and
consistency.
Updated files:
- tests/boards/nrf/rram_throttling/src/main.c
- tests/drivers/flash/common/src/main.c
- tests/drivers/flash/negative_tests/src/main.c
No functional change.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
- reduced block length from 100ms to 33.33ms to compile for low ram
- add compile time conditional option to slave mode
- add overlay file for max32655fthr
Signed-off-by: Anuj Pathak <anuj@croxel.com>
- add basic dma only i2s dts binding for max32-i2s
- add i2s node with default config to max32655.dtsi
- add i2s pin definition for max32655fthr board as per spec
Signed-off-by: Anuj Pathak <anuj@croxel.com>
The GRTC timer, typically used as sys clock on newer nordic chips,
is currently tightly coupled to the CLOCK_CONTROL_NRF drivers though
not being dependent on it. The GRTC and its device driver is
independent from CLOCK_CONTROL, its clock requirements are managed
by hardware, based on its clock source selection.
This commit moves the clock source selection to the GRTC driver, and
removes the hard coupling to the CLOCK_CONTROL drivers. To preserve
backwards compatibility, if CLOCK_CONTROL_NRF_K32SRC_RC is selected,
GRTC will default to LFLPRC.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
As per our naming conventions for public symbols, these utility functions
and macros should be prefixed with "sys_".
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When EC reboot, pwm pins go back to default GPI mode.
After we set pin mode to pwm mode at init(), it would
output low, so LED will be light (LED is low-activated).
And until set_cycles() is called to set output high,
then LED will be turn off the light (PWM-LED flicker).
So add the property to set PWM channel init output level.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Currently all drivers which uses a slot from the debug window have fragile
hardwired slot 'mapping', they are locked to use specific slots even if
there are free slots available for them to take.
The new API hides the management of the slots and descriptors and users
can ask, release or even seize slots that they want to use.
Add a new debug slot manager API and a new default no config option to
allow selection between the hardwired or dynamic debug slot management.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Resize the reserved part of the debug window to cover the first 1K and
define the partial_page0 which will cover the partial slot in page 0.
Add comment to describe the debug window layout.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The current default of 8192 will provide only 2 pages in debug window:
page0: descriptors
page1: slot0
However, the coredump is hardwired to use slot1, which by default is not
valid.
Increase the default window size to 12288 to allow three pages.
This change affects CAVS25 only as it is using default window sizes and the
window 3 is not used in this configuration at all (it was used with IPC3
only), so we do have enough space for the three page - we could even
increase the default to cover 4 pages (8192+8192), but let's be
conservative on this.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The z_gdb_backend_init() is defined to return with success/error code
with return type of int.
Fixes: a9c47a47a4 ("intel_adsp: cavs: add gdb support")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Add additional call before starting time measurement to ensure that
all calls that are benchmarked are already cached. This change allows
to get more stable results as all exectutions are from cache.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This fix addresses a PM failure caused by an inconsistency
between the device tree and the build system. The device tree
was updated with `reg = <0x00000400 DT_SIZE_K(319)>;`,
but the corresponding value for `SL_SI91X_SI917_RAM_MEM_CONFIG`
in CMakeLists.txt was not updated, leading to the problem.
The build system now automatically sets `SL_SI91X_SI917_RAM_MEM_CONFIG`
based on the sram0 RAM size from the device tree using `dt_prop()`
and `list(GET)`, ensuring the configuration matches the device tree
and preventing future mismatches.
Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
This test does not build correctly on some modules, namely TFM, just run
it on a few platform, that should be enough to validate that the feature
is working correctly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit aims to implement IPv4 packet filtering for NAT64 translator.
If packets are consumed, those are not processed anymore by network
stack.
NAT64 packets are created by OpenThread stack and sent on backbone
interface using a raw socket.
This commit attempts to fix an issue where a TCP connection is initiated
by an OpenThread node, but discarded by network stack since there is no
active known connection.
Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
Add memory section which is placed in cpuapp TCM (Tightly Coupled
Memory) RAM0 which is fast, non-cacheable.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
When UART TX pin is in sleep state it should have pull up. So far it
was floating and that could lead to garbage output on terminal.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
