The bmm350_prep_reg_write_rtio_async() function was incorrectly using two
separate SQEs for register writes, creating two distinct I2C transactions:
Before: [START][ADDR+W][REG][RESTART] + [START][ADDR+W][DATA][STOP]
Change to use a single SQE for the entire write:
After: [START][ADDR+W][REG][DATA][STOP]
Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
The default MCXW7x platform's clock uncertainty in microseconds for
Coordinated Sampled Listening (CSL) timing synchronization in
OpenThread shall be set to 20.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
The lptmr clock frequency was wrong and equal to 32000.
The clock frequency is 32.768KHz (32768).
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
Few functions have been corrected to the SSED attachment for the
MCXW72 as leader :
- mcxw_tx():
tx_frame.tx_delay corrected.
Adjusts the scheduled transmission start time to account for the SHR
duration (160us) as requested by the OpenThread radio API.
- mcxw_rx_thread():
Stores the frame counter and key ID from a
security-enabled enhanced ACK into the received packet's metadata
for cryptographic verification.
- mcxw_tx_started() added:
Notifies the registered event handler that a frame transmission has
started, passing the frame buffer as context.
- pd_mac_sap_handler(): timestamp corrected
- mcxw_configure(): IEEE802154_CONFIG_EVENT_HANDLER case updated
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
STM32 platforms now use the default MCUboot operating mode
swap using offset instead of swap using move.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Since the addition of a new storage partition definition in
the nucleo_f746zg dts, there is no need to have this configuration
in the overlay file.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
SomeSTM32 series, like F2, F4, and F7, do not have homogeneous flash
sector sizes; they include very large sectors such as 128 KB
and even 256 KB.
The scratch partition needs to be large enough to hold the largest
sector size ( 256k for F7 and 128k for F2).
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
- Swap using offset requires that slot1 has one extra sector size
compared to slot0
- Additionally, add a storage partition with at least 3 sectors for
NVS if needed.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Update MCUboot configuration so that STM32 no longer defaults to
SWAP_USING_MOVE. Instead, SWAP_USING_OFFSET becomes the default mode
for STM32 boards.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Added overlay files for sam_e54_xpro TC nodes
Added sam_e54_xpro platform allow in testcase.yaml.
Added an extra scenario to testcase.yaml
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Add pwm driver using tc g1 peripheral.
Adds the support for generating pwm output.
Supports 8-bit, 16-bit and 32-bit mode of tc peripheral
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
Adds binding yaml for tc peripheral
Adds the dts nodes for tc peripheral for same5xd5x series and its
default configurations.
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
Add a simple function that exposes the airtime of a packet of a given
length.
Use the new internal implementations of the airtime function when
calculating TX durations inside the send functions to reduce code
duplication on a complex function.
Signed-off-by: Jordan Yates <jordan@embeint.com>
add initial version of devicetree for amebadplus SOC.
amebadplus devicetree file is main platform dtsi file, which should
be included from board dts (e.g rtl872xda_evb.dts)
Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
Added dns_query() function to perform DNS lookup before attempting
SNTP synchronization. This ensures the SNTP server hostname is
properly resolved to an IP address before making the time request.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
The current implementation has a bug in the calculation of
tile offsets, causing them to be calculated incorrectly.
This is particularly evident when there are fractional rows or columns.
Also, there was an assertion that assumed vtiled.
The logic has become too complicated,
so we'll reimplement to simplify this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Ensure that pins configured as inputs are driven high in the port
output register, consistent with open-drain operation. This prevents
inputs from being driven low unintentionally and aligns behavior
with hardware expectations.
Signed-off-by: Josia Strack <j.strack98@gmail.com>
Move the no propagation segment configuration and prop_seg must be 0
logic from the general timing configuration to only apply within the
CAN FD specific sections.
This ensures that for classic CAN mode or platfrom without enhanced
bit timing, prop_seg is always decremented by 1.
The previous implementation incorrectly applied the enhanced bit timing
logic to classic CAN mode, which could cause timing misconfiguration
on devices with enhanced bit timing register support when operating in
classic CAN mode.
Fixes#99746
Signed-off-by: William Tang <william.tang@nxp.com>
Include the header so that resets can be added in
each driver node, for such platforms: mcxaxxx6, mcxa344.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
