- Add a self-contained alarm_capable() probe that starts the device, sets
and cancels a 1-tick alarm, and stops the counter again. This treats
-ENOTSUP as “not capable” and avoids leaving pending alarms.
- Switch single/multiple alarm capability checks to reuse alarm_capable(),
preventing unsupported drivers from running alarm cases and reducing
false failures.
- Ensure capability probing no longer leaves the driver running or with
active alarms, preventing teardown/set_top_value failures in later tests.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Using "pkt->out_len" as the output length of "psa_cipher_[en|de]crypt"
caused a crash in RISCV 64 bits platforms due to misaligned address
access.
The solution is to add a temporary value on the stack to store this lenght
and only after the [en|de]cryption copy it to "pkt->out_len".
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Update regex matching for the Mbed TLS shim driver scenario in order to
match all the supported cases and ensure that they all passed.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Increase heap memory size when Mbed TLS shim driver is used otherwise
all crypto tests will fail on some platforms.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
The reset pin, like most reset pins, is active low. Fix the driver to
treat it as active low and simplify the pin control logic while at it.
Fix all current boards using the wrong pin definition and add a note for
out of tree users.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
add nucleo_g071rb overlay and conf files to configure board
to execute spi_loopback to set up the board for executing the
spi_loopback test on CI.
With this addition, we will now be able to detect SPI and RTIO
regressions on this board.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
If the comparator driver does not support BOTH edge trigger mode,
skip the test instead of failing it.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add RTC node in pic32cx_sg61_cult.dts
Update pic32cx_sg61_cult.yaml to reflect RTC G1 support on the board.
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Add RTC node in pic32cx_sg41_cult.dts
Update pic32cx_sg41_cult.yaml to reflect RTC G1 support on the board.
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
Use the last configured region in the boot config for the next boot,
as opposed to a default region.
Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
The STM32U0 series MCUs don't support TF-M and therefore the
note regarding the `build/tfm` directory needs to be removed.
Signed-off-by: Martin Lampacher <martin.lampacher@gmail.com>
The MQTT-SN v1.2 [0] specification specified the GwAddr as follows:
The GwAdd field has a variable length and contains the address of a GW. Its
depends on the network over which MQTT-SN operates and is indicated in the
first octet of this field. For example, in a ZigBee network the network
address is 2-octet long.
It specifies neither the possible values for the first octet, nor the
format of the network-specific address that follows. Thus, the
specification is incomplete and this functionality unusable.
I also wasn't able to find any implementation which implements a gwinfo
message where the address length is not zero. This includes
https://github.com/eclipse-paho/paho.mqtt-sn.embedded-c .
The current implementation in Zephyr simply copies a `struct sockaddr`
into GwAddr. This is a bad idea for many reasons, the most important one
being that the format is not even specified by POSIX [1]. They only say,
which defines must exist, not what their values are. And in fact, these
even differ between Zephyr and Linux.
Thus, I think it's best to remove the implementation to prevent people from
using this, which may even lead to memory safety issues, depending on the
length of CONFIG_MQTT_SN_LIB_MAX_ADDR_SIZE. If we were to receive an
updated specification, all we'd have to do is to convert between `struct
sockaddr` and mqtt-sn addresses both ways.
[0] https://groups.oasis-open.org/higherlogic/ws/public/download/66091/MQTT-SN_spec_v1.2.pdf
[1] https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/sys_socket.h.html
Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
When the response comes from a gateway, the address length is 0. I renamed
the test which tests a gwinfo from another client to make this more clear.
Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
Enable the CRC peripheral for MCXE24x and turn it on in the
FRDM-MCXE247 board DTS. Add a CRC sample board config to run
on FRDM-MCXE247 with default.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Support CRC16 and CRC32 variants; return -ENOTSUP for unsupported types.
Use kCrcBits16/kCrcBits32 and complementChecksum for IEEE CRC-32.
Stream data via CRC_WriteData() and fetch results via
CRC_Get16bitResult()/CRC_Get32bitResult().
Provide simple thread-safety with a semaphore.
Work around the name clash between Zephyr's typedef crc_result_t and the
MCUX enum name by temporarily redefining crc_result_t around fsl_crc.h
include in this TU.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Make CRC tests conditional based on driver capabilities to support
drivers that implement only a subset of CRC protocols.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Choose CRC protocol in the sample at build time using
CONFIG_CRC_DRIVER_HAS_* guards (CRC8, CRC16-CCITT, CRC32-IEEE, CRC32-C).
Allow optional verification via EXPECTED_* macros; otherwise log result.
Update README to describe selection and add build instructions for
frdm_mcxe247 in addition to ek_ra8m1.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Updates the `bt_le_oob_set_legacy_tk` API docs to encourage the temp key
to be generated randomly for each pairing process.
Updates the `bt_le_oob_get_local` and `bt_le_ext_adv_oob_get_local` to
encourage the user to generate new OOB information for each paring
process.
Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
Most of Espressif drivers ISRs are already running in IRAM area, except
those in this PR. Move ISRs accordingly so we avoid any
interrupt miss when cache is disabled.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
We currently only disable "normal" IRQs with irq_lock(). This is not
sufficient if ZLIs are enabled, as even though they are supposed to
be "above" the kernel, they must not interrupt the poweroff procedure.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
We currently only disable "normal" IRQs with irq_lock(). This is not
sufficient if ZLIs are enabled, as even though they are supposed to
be "above" the kernel, they must not interrupt the reboot procedure.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Implement arch_zli_lock and arch_zli_unlock for the currently only
supported target cortex-M.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Introduce APIs for locking zero latency interrupts.
Zero latency interrupts are defined as non-maskable interrupts
"above" the kernel. They can not be locked by the kernel.
However, there are cases where we do need to mask/lock ZLIs from the
kernel, namely when accessing and changing the state of core shared
hardware like RAM and the CPU which must be done atomically.
A common case is when powering down or rebooting the SoC. We can't
allow any IRQ, ZLI or not, to interrupt these operations. In any case,
such an interrupt would be immediately followed by the CPU being off,
and whatever process running from ZLIs would be terminated anyway.
Since we have specific usecases which require these APIs, and there
are already drivers and socs which do lock ZLIs by directly calling
arch APIs to acheive this, let's officially add the APIs with
appropriate documentation detailing expected usecases and warning of
the dire consequences of misusing it, keeping it in arch/cpu.h to
limit exposure of the API (compared to having it in zephyr/irq.h).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Call pm_policy_device_power_lock_put/pm_policy_device_power_lock_get
to coordinate with system level power modes.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
- Ensure that properties have 2 new lines when node is above it.
- Enures that 1 new line is required between a node and #if/#ifdef...
- Enures that 2 new line are required between #endif and node.
- Wraps property values that exceed 100 characters in length.
Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
dts-linter 0.3.7-hotfix2 Security Updates:
- Update `glob` to address CVE-2025-64756
- Update `js-yaml` to address CVE-2025-64718
Formatting updates:
- Ensure that properties have 2 new lines when node is above it.
- Enures that 1 new line is required between a node and #if/#ifdef...
- Enures that 2 new line are required between #endif and node.
- Wraps property values that exceed 100 characters in length.
Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
The packet priority support is disabled by default so that the
application can work "normally" as a sample for trying network
packet filtering.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The readme file did not mention the network packet priority
based rules 1-5 introduced recently.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Shorten long lines with \ chars in NPF_PRIORITY macro so that the output
looks good if user is using narrower window to view the code.
Reformat \ in NPF_RULE macro so that the code looks better.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Honor the comment in the code and make sure RX is started
before TX so that we can receive responses to any data we
are sending.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Configure ADC and DAC to use the Analog pin on the Mikrobus
connector as input/output to enable ADC and DAC samples.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add ADC to supported list for testing on boards that have a
zephyr,user io-channels property.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add PWM configuration on boards that have LEDs, but were
missing a definition of pwm-leds.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
xg24_dk2601b and bg22_ek4108a has PWM configuration in Devicetree,
but didn't enable PWM for testing. xg24_dk2601b has RGB LEDs,
add aliases to enable the rgb_led sample.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The Counter alarm sample contains a hard-coded list of devicetree
nodes to use. Since the definition of the counter node was changed
on Series 2 devices in #97912, this sample hasn't compiled.
Update the sample to select the correct devicetree node, and
add representative boards to platform_allow to allow the sample
to be tested on Series 2 boards.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add overlays enabling DMA for Silabs boards to enable use of the
async API on the default shell uart.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
