Implement proper support for isochronous operation when "st,stm32-usb" IP
is used. Previously, the driver did not take into account specificities of
this IP regarding isochronous endpoints resulting in invalid transfers.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Update the copyright notice to use SPDX-FileCopyrightText. While at it, add
STMicroelectronics to the list of copyright holders as we have made
numerous contributions to this driver recently.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move options such that all generic options go toghether, followed by
hardware-specific ones and wrap the HW-specific options in dedicated menus.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Use a code spell-checking tool to detect and fix spelling errors in
the files under `boards/xxx`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add sleep hold flag to allow setting groups of pins to
automatically hold pad value during low power states (light/deep sleep).
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add hardware pad function, configurable in DTS, which holds the pin
state when transitioning to a low power state (light/deep sleep).
Once set in DTS, PM interface will automatically handle holding
the pin state before transitioning it into a low power state.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add hardware and software strategies to switch pins to low power
mode both in light and deep sleep. Add hold feature to device tree
flags to allow application to configure which pins will be
automatically held (pin state preserved) during sleep.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Remove pinctrl sleep group init. Low power state for pinctrl will
be managed using harware feature.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
This reverts commit 6029af2dfce1b42e4a6d6741600dd0e28a357701.
Sleep pinctrl groups won't be used any longer for Espressif chips.
Strategy to switch pins to low power mode is enabled using hardware
feature.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
This reverts commit 85d3320b78fd51805146e1cf04b68011020b11f8.
Sleep pinctrl groups won't be used any longer for Espressif chips.
Strategy to switch pins to low power mode is enabled using hardware
feature.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
To prevent missing calibration when adding new series, add an error
message if no calibration is done.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The change allows to keep FPROTECT, that can handle max of
62k partition size, enabled out of the box.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Guard the STM32WBAX power driver `mpu_state` variable with
CONFIG_ARM_MPU.
With this change, CONFIG_PM=y and CONFIG_ARM_MPU=n now build
correctly on STM32WBA.
Signed-off-by: Lubos Koudelka <lubos.koudelka@st.com>
use zephyr ring buffer and also read and write more
than one char at a time.
Also use events to notify new rx or tx.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
CONFIG_CONSOLE_GETCHAR doesn't need
`CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS`
and `CONFIG_CONSOLE_HANDLER` since a long time.
So don't select it unnessesaryly.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Update the display sample application to support the newly introduced
pixel formats:
- PIXEL_FORMAT_BGR_888: 24-bit BGR format with 8 bits per component
- PIXEL_FORMAT_ABGR_8888: 32-bit ABGR with alpha channel
- PIXEL_FORMAT_RGBA_8888: 32-bit RGBA with alpha channel
- PIXEL_FORMAT_BGRA_8888: 32-bit BGRA with alpha channel
Refactor the fill_buffer functions to accept the pixel format as a
parameter and dynamically construct colors based on the format's
component ordering. This ensures correct color rendering across
different pixel format layouts.
Also add default cases to switch statements for improved code
robustness and consistency.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add support for additional pixel formats in the SDL display driver
to align with the newly introduced display pixel formats:
- PIXEL_FORMAT_BGR_888: 24-bit BGR format with 8 bits per component
- PIXEL_FORMAT_ABGR_8888: 32-bit ABGR with alpha channel
- PIXEL_FORMAT_RGBA_8888: 32-bit RGBA with alpha channel
- PIXEL_FORMAT_BGRA_8888: 32-bit BGRA with alpha channel
Also refactor existing conversion functions to use C99-style loop
variable declarations for consistency.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add test cases for the newly introduced pixel formats in the display
read/write test suite to ensure proper functionality:
- PIXEL_FORMAT_BGR_888: 24-bit BGR format with 8 bits per component
- PIXEL_FORMAT_ABGR_8888: 32-bit ABGR with alpha channel
- PIXEL_FORMAT_RGBA_8888: 32-bit RGBA with alpha channel
- PIXEL_FORMAT_BGRA_8888: 32-bit BGRA with alpha channel
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add support for additional pixel formats, so that the display pixel
formats are aligned with the video pixel formats:
- PIXEL_FORMAT_BGR_888: 24-bit BGR format with 8 bits per component
- PIXEL_FORMAT_ABGR_8888: 32-bit ABGR with alpha channel
- PIXEL_FORMAT_RGBA_8888: 32-bit RGBA with alpha channel
- PIXEL_FORMAT_BGRA_8888: 32-bit BGRA with alpha channel
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
A struct net_sockaddr should be considered an incomplete type, replace by
using net_sockaddr_storage.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
If `attr` or `attr->user_data` is NULL, then the include
characteristic is invalid. However the function,
bt_gatt_attr_read_included, should not return an errno value, but
a GATT error. The reason why errno cannot be used, is that the
return value is parsed through err_to_att which would make
-EINVAL become 0x16 (depending on the libc implementation),
which is an invalid ATT error code.
This was incorrectly introduced by commit
5a8189bf2a.
Changed the return value from errno to a proper GATT/ATT error.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Add an overlay to test SPI on Nucleo-C5A3ZG, and add the board to the list
of test cases.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
There are different naming conventions between
the two HAL, so we make conditional compilation
through intermediate symbols.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Select the GPIO driver in the Kconfig if at least one active SPI instance
is using a GPIO Chip Select.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
In case PPP driver is configured in asynchronous UART mode, any send
attempts should wait for the previous transfer to complete, otherwise
modifying TX buffer would disrupt the ongoing transfer.
So far the driver waited for previous transfer to complete only before
scheduling the next one, but instead it should wait before it even
starts to modify the buffer.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Updated the interrupt handler to connect all interrupt lines added
in the corresponding sercom uart node.
Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
