There are currently two other sdhc drivers that support this interrupt:
Infineon and Ambiq. Both those vendor HALs automatically mask the
interrupt after invoking the callback[1][2], expecting the user to
unmask it asynchronously once they've cleared the card's interrupt
condition.
The NXP usdhc driver doesn't do this and so is inconsistent with the
other two. This has caused bugs with higher-level drivers, such as the
AIROC Wi-Fi driver (#101100). Fix the issue by masking the interrupt
ourselves.
[1] 470f874ce4/mtb-hal-cat1/source/cyhal_sdhc.c (L1251-L1260)
[2] 5efc022852/mcu/apollo510/hal/mcu/am_hal_sdhc.c (L2256)Fixes#101100
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
* Adds overlay to support pwm_gpio_loopback on kit_psc3m5_evk board.
* Updates pwm_gpio_loopback timing on kit_psc3m5_evk to better align
with system timer for better measurement accuracy.
* Updates gpio_loopback test on kit_psc3m5_evk to share connections with
pwm_gpio_loopback test.
Signed-off-by: John Batch <john.batch@infineon.com>
Adds support for the Infineon kit_psc3m5_evk evaulation board.
Note: The current implementation of PWM does not support output to a pin
with an on-board LED. Output can be observed using an oscilloscope on
pins P1.4 and P2.6.
Signed-off-by: John Batch <john.batch@infineon.com>
Moves clock selection/assignment from the clock driver to the
peripherals that subscribe to the clock. This allows multiple
devices such as PWM/Counters to share a peripheral clock.
Signed-off-by: John Batch <john.batch@infineon.com>
Adds making a peripheral clock connection to the initialization for
SDHC. Other updates to use the clk_dst field from the binding.
Signed-off-by: John Batch <john.batch@infineon.com>
Updates the Infineon Counter and PWM drivers based on the TCPWM device
to connect with a clock. This update allows multiple devices to connect
to the same peripheral clock, and supports the TCPWM architecture of the
PSC3 device family.
Corrects initialization of the PWM on the PSC3 family to select the
correct output type.
Signed-off-by: John Batch <john.batch@infineon.com>
Adds making a peripheral clock connection to the initialiazation for SCB
based drivers. These drivers are the UART/Serial driver, I2C driver, and
SPI driver.
Signed-off-by: John Batch <john.batch@infineon.com>
Adds a new clock destination binding to the Infineon scb and tcpwm
peripherals. This field is used to connect the peripheral to a
peripheral clock.
Signed-off-by: John Batch <john.batch@infineon.com>
* Socket TLS: crypto features are no more automatically selected and this
must be explicitly done for each application.
* HostAP: usage of PSA Crypto API is enabled by default.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Use the TLS ciphersuite Kconfigs to select the desired TLS connection mode
instead of manually selecting all the crypto/key-exchanges Kconfigs.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
'net.coap.server.common' and 'net.coap.server.secure' test the very same
thing. Both include 'prj.conf' file which configure the TLS connection,
but then 'net.coap.server.secure' re-add these TLS Kconfigs also in the
yaml file which is pointless.
Since we're talking about a secure connection in both cases, remove
'net.coap.server.common' and keep only 'net.coap.server.secure'. Then
for the latter use only 'prj.conf' to hold the configuration.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Now that CONFIG_NET_SOCKETS_SOCKOPT_TLS doesn't select unnecessary crypto
features there is no need to re-disable them in the main configuration
file of this test code.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Use the TLS ciphersuite Kconfigs to select the desired TLS connection mode
instead of manually selecting all the crypto/key-exchanges Kconfigs.
For 'samples/subsys/mgmt/hawkbit' use the 'overlay-tls.conf' file for
testing 'sample.net.hawkbit.tls' instead of repeating the Kconfigs in the
yaml file.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Set CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_MBEDTLS_PSA enabled by default
meaning that PSA Crypto API are used by default instead of legacy crypto.
Some Kconfigs for EC and RSA keys are also enabled there in order to
allow support of private key management.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
There is no reason for which CONFIG_NET_SOCKETS_SOCKOPT_TLS should select
some crypto features by default. The correct list really depends on the
server/client the device would like to connect to.
For this reason the selection of any crypto feature is removed from
CONFIG_NET_SOCKETS_SOCKOPT_TLS with the idea that the proper ciphersuite
is to be enabled in the final sample/test configuration file.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Add new Kconfigs which are specific for certain TLS ciphersuite. The idea
is that instead of enabling key-exchanges related Kconfigs and then adding
all possible dependencies/selections there (which is not strictly correct)
the user enables a specific ciphersuite for which is easier and more
accurate to specify dependencies.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
- Change base register for TCPWM to 0x40200000
which controls the entire IP block.
- Enabling/Disabling counters and handling
global interrupts.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Add device tree overlay configuration for the Infineon PSoC4100S Max
board to enable the counter alarm sample.
The overlay configures TCPWM0_1 for counter operation with interrupt
18 and clock divider settings appropriate for the PSoC4100S Max chip.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
When running twister on Windows host, the build will fail from
cmakecache.py with error as:
UnicodeDecodeError: 'cp950' codec can't decode byte 0xe2 in
position 3444: illegal multibyte sequence
Signed-off-by: Sharon Lin <slin@atmosic.com>
The cmsis_dsp tests were failing on the m55 due to incorrect
instructions being generated. Enabling Helium (MVEI/MVEF)
fixes the issue and most of the tests now pass.
Several tests are still failing unfortunately but no longer are
the tests failing on an vld1.16 instruction.
Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
Add the `DEVICE_API` wrapper to the remaining `uart_driver_api` instances,
ensuring that each driver API is placed in its respective linker section.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
None of the current maintainers are engaging with incoming issues and
pull requests for WCH Platforms.
This commit makes them collaborators in an attempt to reflect better the
atatus quo and help some of the current PRs get merged by means of other
volunteers stepping in to review on a best effort basis.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
as we are only handeling rx interupts, we don't need
to call uart_irq_is_pending to check, we can just directly
use uart_irq_rx_ready.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
While in PRE_KERNEL stage, scmi_send_message_polling() attempts to acquire
the transmit channel mutex, which should not be allowed as the kernel is
not fully initialized at this point.
Since there's no multithreading at this point, there's no need to use a
mutex anyways. Therefore, perform mutex acquire()/release() only if not
in PRE_KERNEL phase.
Note that the return value of k_mutex_lock() is already suppressed via
an -EBUSY return value so no behavioral change here.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In current implementation, the sending buffer size is 0x10000. This
will result in a very small amount of RAM available for the
application. Actually, the maximum required sending buffer size is
4KB.
Reduce the maximum sending buffer size by changing
`SEND_BUFFER_MAX_LENGTH` from 64KB to 4KB.
And add runtime assertions to prevent buffer overflows during firmware
upload.
- Change SEND_BUFFER_MAX_LENGTH from 0xFFFF to 4096 (4 KB)
* Reflects the actual maximum FW chunk size supported by hardware
* Reduces memory footprint from 64 KB to 4 KB
- Remove unnecessary +1 from send_buffer array size
- Add __ASSERT checks in fw_upload_v1_send_data() to validate
memcpy does not exceed buffer size
- Add __ASSERT checks in fw_upload_v3_send_data() to validate
memcpy does not exceed buffer size
This prevents potential buffer overflows when copying firmware data
and ensures the buffer size matches hardware capabilities.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Add generic board support for the AMD Versal APU platform. This enables
basic application development on Versal APU cores using standard board
configuration.
Includes board definition files, defconfig, and device tree integration
for the Versal APU board.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Add initial support for the Versal SoC APU, which is based on
the Arm Cortex-A72 processor. It includes basic wiring for memory
regions, UART, interrupt controller, and timer.
This commit introduces the SoC definition and MMU configuration
required for APU-based development on the Versal platform.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
CID (card id register) can be useful to application for traceability of SD
cards (#66460).
Adds disk ioctl command to get the CID data that is read at initialisation.
Changes the card_read_cid function to take pointer to cid register so that
the ioctl command can utilize with the passed user buf. Updated
calling functions to pass this pointer.
Signed-off-by: John Whittington <git@jbrengineering.co.uk>
CID (card id register) can be useful to application for traceability of SD
cards.
Adds disk ioctl command to get the CID data that is read at initialisation.
The struct sd_cid is moved to sd_card so that it can be read and retrieved
by card_ioctrl.
Signed-off-by: John Whittington <git@jbrengineering.co.uk>
This commit adds support for the Xilinx AXI Ethernet Lite device,
also known as the emaclite.
The emaclite is a light-weight 10/100 MII Ethernet device.
It foregoes a DMA to reduce chip area.
Instead, it uses memory-mapped transmit/receive buffers.
A selection of features can optionally be enabled:
- a second ("pong") RX/TX Buffer
- MDIO support
- Interrupt support
This driver handles the MAC functionality of the core;
a driver for the MDIO part is introduced separately
as an MDIO driver.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
This commit adds support for the Xilinx AXI Ethernet Lite device,
also known as the emaclite.
The emaclite is a light-weight 10/100 MII Ethernet device.
It can optionally be configured to include an MDIO.
The MMIO interface is controlled via MMIO registers and requires
the software to busy-wait until completion.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
Added pmod_serial, pmod_spi and pmod_header node labels to
EK-RA2L1 device tree board definition, allowing compatible
shield boards to be used.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
Enable WDT_DISABLE_AT_BOOT by default for MCXE24X SoC series to prevent
unexpected system resets during initialization and development.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Add an optional power policy hook to provide custom "next event"
ticks during pm_system_suspend(), in addition to the existing
kernel ticks and policy event list.
This hook enables applications and SoC-specific code to derive
the next wake-up time directly from proprietary or
hardware-specific data structures (e.g. hardware registers,
binary-only modules, complex schedulers) that are not
practical to convert into the standard PM policy event list.
The feature is gated by CONFIG_PM_CUSTOM_TICKS_HOOK and is fully
backwards compatible when disabled.
Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
