Commit graph

126,787 commits

Author SHA1 Message Date
Tony Han
4c6aa7da31 soc: microchip: sam: optimize name for sama7g5 programmable clock
Change the location of the names for programable clocks from the
stack to "static struct clk_programmable" array.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:09 +03:00
Cla Mattia Galliard
630a496096 samples: net: QoS: Add quality of service sample
Add a sample, that shows the power of quality of service in Zephyr.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Cla Mattia Galliard
f3b6d77ad4 net: shell: filter: Update table
Adjust table to print newly available information.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Cla Mattia Galliard
4e3024b110 net: tc: allow to spread threads by more then 1 priority level
Allow to spread tc threads by more then one priority level and cleanup the
computation of the priority.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Cla Mattia Galliard
a4723d4a95 samples: net: pkt_filter: Add priority filters
Add some priority filters to the sample for demonstration purpose.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Cla Mattia Galliard
c8461a1aa6 doc: net_pkt_filter: Document priority rules
Add documentation for newly added priority rules.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Cla Mattia Galliard
8d38e720a4 net: pkt_filter: Filters to modify priority to incoming packets
To enable quality-of-service (QoS) applications, allow filters to modify
the priority of an incoming packet. This allows that processing can be
done on tc-queue-threads with different priorities.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-10-21 17:25:56 +03:00
Scott Worley
64ed0f70a1 soc: microchip: mec: Add common ECIA GIRQ and MMCR routines
We added ECIA GIRQ get/set/clear functions avaiable for
all MEC parts. Drivers can make use of these functions
to get, set, and clear GIRQ status and enables for
their peripheral. In cases where code requires 8/16 bit
access to these or other SoC registers we added inline
helpers modeled after Zephyr's 32-bit sys_read/write/test
routines. This commit is part of a long term goal to share
drivers among all the MEC parts.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-10-21 17:25:40 +03:00
Lin Yu-Cheng
fed6a9d9b5 driver: espi: implement espi PM function
1. add cs pin as espi driver wake up reference
2. removed the unnecessary update of the cached date
3. removed the unnecessary busy wait in notify funciton

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-10-21 17:25:10 +03:00
Marek Matej
45c9babce6 drivers: flash: esp32: Add asynchronous flash access using work queue
Direct flash access can cause exceptions when performed while the flash
memory is inaccessible or being modified — for example, when code is
executing from PSRAM. To avoid such invalid access, this change introduces
asynchronous flash operations that are executed from a safe runtime context
via a work queue. This ensures all flash accesses occur only when the flash
is valid and accessible.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-10-21 17:24:55 +03:00
Dag Erik Gjørvad
de402cb465 boards: nordic: Add initial support for nRF54LM20A/ns
Add board files for nRF54LM20A/ns.
Update existing nRF54LM20A board files to support this.

Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
2025-10-21 17:24:11 +03:00
Dag Erik Gjørvad
e151273543 manifest: Update commit id for trusted-firmware-m
Update commit id for trusted-firmware-m
to bring in support for nRF54LM20A/ns.

Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
2025-10-21 17:24:11 +03:00
Torsten Rasmussen
0371ffda18 samples: pass on board revision in sysbuild/hello_world
Pass on the board revision to remote image build if specified for the
application image board target.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2025-10-21 17:24:00 +03:00
Torsten Rasmussen
1d827bc5f8 samples: cleanup sysbuild/hello_world sample
Remove the prompt for REMOTE_BOARD.
REMOTE_BOARD should not be having a prompt or be configurable on command
line.
Instead REMOTE_BOARD should be defined based on the SoC as this will
allow creation of new boards using the same SoC, and thereby be able
to build the sample out-of-the-box for any supported SoC.

This allows us to remove several single line config files.

For SoCs with more than two CPU clusters, such as the nRF54h20, then a
choice is provided to select specific core.

Remove the REMOTE_BOARD restriction, as this sample will build and run
even for single core SoCs, and may be useful for testing other sysbuild
multi-image features even for single cores SoCs.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2025-10-21 17:24:00 +03:00
Matheus Marques
816489e321 mgmt: hawkbit: Add options to not confirm or erase at init
Current implementation forces confirmation of current boot image and
second slot erase at hawkbit_init() and it is impossible to communicate
with hawkBit server without running it. This makes impossible to notify
update failures to server (#71750)

Add option HAWKBIT_CONFIRM_IMG_ON_INIT to allow disabling the auto image
confirmation and HAWKBIT_ERASE_SECOND_SLOT_ON_CONFIRM to select if the
second partition slot shall be erased or not.

Disable those to handle of these behaviors on application code.

Signed-off-by: Matheus Marques <code@matheusmbar.com>
2025-10-21 17:23:45 +03:00
Jiafei Pan
bca62b6043 counter: add counter_ticks_to_ns()
Add new API to get nanosecond from counter ticks.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-10-21 17:23:34 +03:00
Hieu Nguyen
08ffc97e2a samples: drivers: spi: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI sample support for Renesas RZ/V2L-SMARC, RZ/A3UL-SMARC

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Hieu Nguyen
03779aa85a tests: drivers: spi: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI test support for Renesas RZ/V2L-SMARC, RZ/A3UL-SMARC

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Hieu Nguyen
e49263a51f boards: renesas: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI support for board Renesas RZ/V2L-SMARC, RZ/A3UL-SMARC

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Hieu Nguyen
6ca258e9cc dts: renesas: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI nodes to Renesas RZ/V2L, A3UL

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Hieu Nguyen
04018d6433 drivers: spi: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI driver support for Renesas RZ/V2L, A3UL

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Adam BERLINGER
f97eba57d8 drivers: video: stm32_dcmipp: Initialize ISP only once
This fixes bug where stm32_dcmipp_isp_init is called multiple times.

Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
2025-10-21 17:23:13 +03:00
Muhammed Asif
6068f062b1 boards: microchip: sam_e54_xpro: Enabled blinky pwm support
Added the pinmuxing as well as the dts node for supporting
blinky on sam_e54_xpro board.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-10-21 17:23:02 +03:00
Muhammed Asif
8f6b71312f drivers: pwm: microchip: add support for pwm tcc g1 IPs
Add pwm driver using tcc g1 peripheral.
Adds the support for generating pwm output.
Supports both 16-bit and 24bit mode of tcc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-10-21 17:23:02 +03:00
Muhammed Asif
3c93b11a74 dts: arm: microchip: add tcc node for pwm peripheral
Adds the dts nodes for pwm driver using tcc peripheral.

Signed-off-by: Muhammed Asif <Muhammed.Asif@microchip.com>
2025-10-21 17:23:02 +03:00
Muhammed Asif
accc980a47 dts: bindings: microchip: add tcc node for pwm peripheral
Adds binding YAMLs for pwm peripheral

Signed-off-by: Muhammed Asif <Muhammed.Asif@microchip.com>
2025-10-21 17:23:02 +03:00
Etienne Carriere
d0c829a482 drivers: video: stm32: test HAL functions return value
Add missing test of some HAL functions return value.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-21 17:22:52 +03:00
Etienne Carriere
493993e0a6 drivers: video: stm32: don't mix HAL return value and errno
Clarify HAL return value is of type HAL_StatusTypeDef and not an
int in STM32 DCMI and DCMIPP drivers. For consistency, rename
the variable holding HAL return value from ret to hal_ret.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-21 17:22:52 +03:00
Fin Maaß
fc7a01a8b1 boards: litex: move changeable peripherals to board
move changeable peripherals from dtsi to board, as
in litex these can change and might be on
different registers on custom out of tree
boards. So we limit riscv32-litex-vexriscv.dtsi
to just the interrupt controller and the cpu,
which don't change.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-10-21 17:22:40 +03:00
Firas Sammoura
ef49739f06 riscv: pmp: Factor out PMP address reading logic
Refactor the code to read all PMP address CSRs (pmpaddr0 through
pmpaddrN) into a new helper function, `z_riscv_pmp_read_addr`.

This change encapsulates the register reading loop, improving code
organization and potential reusability. The new function includes size
assertions

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-10-21 17:22:26 +03:00
Alberto Dalibor Rodda
2b5d0faa53 cmake: mcuboot: Fix build with RAM load and encryption
Fix wrong byproduct name for the unencrypted slot 1 image, avoiding
conflicts with the encrypted image.

Signed-off-by: Alberto Dalibor Rodda <fiabarod@proton.me>
2025-10-21 17:22:16 +03:00
Jukka Rissanen
29dd85aa36 tests: Make sure to use ZVFS_OPEN_SIZE define
As the CONFIG_ZVFS_OPEN_MAX is set to 0 by default, we must
use ZVFS_OPEN_SIZE in the tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
7573a3a699 tests: Remove not needed CONFIG_ZVFS_OPEN_MAX option
Either remove the option from conf file or adjust its value
by using CONFIG_ZVFS_OPEN_ADD_SIZE_NET option because the
max number of socket descriptors is now calculated dynamically
at built time.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
4b1c6b2882 tests: net: Allow setting CONFIG_ZVFS_OPEN_MAX
Add CONFIG_ZVFS_OPEN_IGNORE_MIN=y so that we can set the
CONFIG_ZVFS_OPEN_MAX without specifying individual sub values.
This is just specific to this test and not something that needs
to be done in other tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
5d1f6d4569 samples: Remove not needed CONFIG_ZVFS_OPEN_MAX option
The number of file/socket descriptors is now determined by
CONFIG_ZVFS_OPEN_ADD_SIZE_* options and the networking side
already sets the minimum values so the CONFIG_ZVFS_OPEN_MAX
option is not needed.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
0215b0aad1 samples: net: Remove / replace the CONFIG_ZVFS_OPEN_MAX option
Remove unneeded CONFIG_ZVFS_OPEN_MAX config option as it is now
controlled by number of net_context i.e., CONFIG_NET_MAX_CONTEXTS

Some of the samples now use CONFIG_ZVFS_OPEN_ADD_SIZE_NET_SAMPLE
to specify the sample socket needs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
1cd1959cfc snippets: wifi: Set default number of sockets to use
Set the minimum number of sockets that are used by the wifi snippets.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
dbe59a5faf net: sockets: tls: Add ZVFS_OPEN_ADD_SIZE_TLS to count TLS sockets
Make sure that the CONFIG_NET_SOCKETS_TLS_MAX_CONTEXTS will
reflect the number of required file descriptors in the system.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
bc44a27b26 net: context: Make sure to allocate enough sockets
The number of net_context now determines the minimum amount
of network sockets that are to be allocated.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
867128011e scripts: compliance: Add ZVFS_OPEN_ADD_SIZE_ to undef whitelist
The ZVFS_OPEN_ADD_SIZE_ is used as a prefix for matching specific
Kconfig option names, i.e. it's not a real option in itself.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
f39ee91940 samples: net: Allow app to control the amount of sockets used
Create a Kconfig entry that allows the application to control
how many sockets it needs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
5d4e4e5018 lib: posix: device_io: Add standard file descriptor sizes
Make sure we always allocate space for stdin, stdout and stderr file
descriptors if Posix device io option is enabled.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
4e306364bd doc: migration-guide-4.3: Add entry about file descriptor table changes
The file descriptor table size is now controlled by adding together
the values of CONFIG_ZVFS_OPEN_ADD_SIZE_* options.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Jukka Rissanen
1cfdf7c8d1 lib: Introduce a way to set minimum file descriptors count
Instead of user trying to figure out what is the amount of file /
socket descriptors in the system, let the various subsystems etc.
specify their need using a Kconfig option. The build system will
then add these smaller values together and set a suitable file
descriptor count in the system.

This works the same way as the heap size calculation introduced
in commit 3fbf12487c

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-10-21 17:22:03 +03:00
Mathieu Choplain
f8c0da3444 drivers: usb: udc: stm32: fix FS mode on OTG_FS for STM32F4 series
On most parts of the STM32F4 series, when the OTG_HS controller is used in
FS mode, the ULIP **low-power** clock must also be disabled for proper
operation. This was done properly in an old version of the driver but was
lost as part of refactoring[1].

Re-introduce ULPI low-power clock disable when OTG_HS is used in FS mode.

[1] See commit e31ddec781

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 17:21:52 +03:00
Aksel Skauge Mellbye
3605c36b31 drivers: entropy: gecko_trng: Ensure bus clock is enabled
Ensure bus clock is enabled before accessing TRNG FIFO on
Series 2 VSE devices.

This is a minimal bugfix to work around an issue where certain
HAL APIs disable the bus clock after accessing the crypto block.
Long term, this driver should be rewritten to properly use
clock control APIs for clock management.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-10-21 17:21:39 +03:00
Tomas Pajurek
145637c04b Debugging: Fix GDB packet parsing for ARM Cortex M
When analyzing Zephyr coredumps from ARM Cortex M, sometimes the GDB
server fails with the error 'binascii.Error: Odd-length string'.
This happens because the GDB packet parsing logic does not correctly
handle the '=' separator in register write packets containing register
identifiers with more than one letter/digit. Fix it by properly
locating the '=' character and slicing the packet string accordingly.

Signed-off-by: Tomas Pajurek <tomas.pajurek@spotflow.io>
2025-10-21 17:21:28 +03:00
Mathieu Choplain
26f5469068 drivers: usb: device: stm32: fix N6 power-up sequence logic
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 17:21:18 +03:00
Mathieu Choplain
f413980cc0 drivers: usb: udc: stm32: fix N6 power-up sequence logic
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 17:21:18 +03:00
Tom Chang
2b1ea37ef2 driver: peci: npcx: prevent sleep during PECI transactions
This commit prevents enter deep sleep mode during PECI transactions
since clocks if PECI will stop.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-10-21 17:21:05 +03:00