Use level triggered interrupts instead of edge triggered interrupts to
make it impossible for the interrupt line to be active without the RX
thread attempting to read pending data.
This fixes a race condition for re-enabling the interrupt in edge
triggered mode, where `gpio_pin_interrupt_configure_dt` is not called
before the controller re-asserts the interrupt line.
As a result the controller can be reset before booting the RX thread.
Fixes#53980.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enfore a minimum duration between edges on the IRQ pin to give the HCI
controller time to detect the state change. Without this delay and with
several packets queued on the `rx_queue`, the pin could be re-asserted
almost immediately after being cleared.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some single-precision float constants were being compared against
double-precision floats. Make the constants doubles.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add Port 14/15 to device tree. These ports can only be configured as input.
Error out in gpio driver if user sets them as output.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
XMC4500 and XMC47/800 MCUs have a different memory layout. The
definitions have been moved to the derivative .dtsi of each MCU.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Regenerate/rewrite the Bosch M_CAN register field definitions using the
GENMASK() and BIT() macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use the FIELD_PREP() and FIELD_GET() macros instead of manual bitshifts and
masking. Be consistent in the use of register field definition macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the local "const struct can_mcan_config *" variables from "cfg" to
"config" to be consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Get rid of the can_mcan_configure_timing() helper function as it provides
no benefit to just having the implementation split in can_mcan_set_timing()
and can_mcan_set_timing_data().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the driver initialization function to the bottom of the file to be
consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Pass a pointer to the struct device for internal driver functions instead
of passing around a pointer to the register struct.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reading the temperature calibration data requires disabling the icache
of the stm32h5x mcu.
Else a bus fault error occurs reading Address: 0x8fff8014-0x8fff818
Enable afterwards.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
The atsame54_xpro has an AT24MAC402 MAC chip on SERCOM7 at I2C address
0x5E, but it is not used by default. Fix this by copying from the
sam_e70_xplained and changing the I2C address to match the strapping pins
on the atsame54_xpro. Tested with the dhcpv4_client sample project to
confirm that the MAC address is no longer randomly generated.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
The table of supported features for the atsame54_xpro is missing many
peripherals and drivers. The pin mapping list is also incomplete. Update
the table and list to match the set of soc-compatible drivers and the
atsame54_xpro devicetree, respectively.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
Updates the FIFO and LIFO documentation to clarify behavior
surrounding re-adding data items to queues.
Fixes#56336
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Adds a Kconfig symbol which contains the default controller TX power
directly in dBm. This allows code to directly display/use the configured
power, instead of having to manually iterate over all the
`BT_CTLR_TX_PWR` options.
```
LOG_INF("BT controller configured for %ddBm TX power",
CONFIG_BT_CTLR_TX_PWR_DBM);
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Move the build-only test for the MCP2515 CAN controller driver to the
tests/drivers/build_all/can/ folder.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add the missing app_memdomain.h header needed if userspace is enabled.
This snuck in because the file that was using it already had included
the same header.
Signed-off-by: Yuval Peress <peress@google.com>
It was previously assumed that the 'sys_mem_blocks' struct would maintain
information about contiguous blocks allocated so the release API only
took the starting address. This led to an issue where allocating 2+
blocks would end up with a memory leak because any block not being the
first would never be released.
Add the buffer length as an argument so the correct number of blocks can
be released. Also, ammend the tests to match and verify.
Signed-off-by: Yuval Peress <peress@google.com>
The previous RTIO mempool allocation was found to be faulty. Since the
map entries were indexed using the sqe, as soon as the sqe and cqe were
no longer in sync, there was a contention. Effectively a new sqe needing
memory would assume the entry was already consumed by themselves. This
was caused by 'rtio_sqe_rx_buf()' being effectively reentrant (i.e. if
called more than once, it'll return the same buffer). So when the map
entry was marked as allocated it was assumed that it belonged to the sqe
in question and used. This led to the producer writing to memory that
was actively being read by the consumer.
Instead, the sqe's own buf/buf_len fields are used to store the memory.
Once allocated, the memory is stored there and no mapping is needed.
Signed-off-by: Yuval Peress <peress@google.com>
When attempting to add a new platform and run the suite with
`twister`, it seemed to be resulting in being statically
filtered-out. Likely, the correct filter is `test_dma0`,
assuming that `test_dma*` nodes should be enumerated starting
at 0.
Verified the fix by adding `dma` as `supported` to
`boards/arm64/bcm958402m2_a72/bcm958402m2_a72.yaml` and by
adding the `test_dma0` node to
`chan_blen_transfer/boards/bcm958402m2_a72.overlay`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
Add option to shuffle tests (randomly) before they are split into subsets.
This allow to fairly distribute tests across subsets,
so that long tests are not crowded in a single group.
This also allows to detect unwanted dependencies in test execution order.
Also, added option to provide custom seed to random generator
used to shuffle tests.
This will allow to reproduce certain test order if needed.
Used seed is printed at console.
Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
Rather than pass an variable address to a `void *` in
`pthread_join()` and do nothing with it, just pass `NULL`.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
The `test_pthread_descriptor_leak` test was causing a kernel
panic on some platforms. Initially, it was not clear why.
The usual cases were examined - race conditions, stack sizes,
etc. Still no luck.
As it turns out, recycling a thread stack (or at least the
`pthread_attr_t`) in-place does not work on some platforms,
and we need to reinitialize the `pthread_attr_t` and set
set the stack property again prior to calling
`pthread_create()`.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
The `SCHED_OTHER` scheduling priority is mandatory as part of
POSIX. It must be numerically distinct from `SCHED_FIFO`,
`SCHED_RR`, and `SCHED_SPORADIC`, but is implementation-
defined and may behave identically to `SCHED_FIFO` or
`SCHED_RR`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
