SoC hooks are defined as weak functions for the case where they are
not implemented by a SoC. The problem that may happen is when an
application define it as weak as well. In this case, no compilation
error is issued but the version that will be used depends on the build
order. Just remove the weak placeholder implementation.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This board has the capability to use SERCOM2 as an i2c
interface on pins 8 and 9.
This adds the neccessary pinmux settings and devicetree
node.
Tested with the i2c shell module.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
Interrupt polarity register don't support rising and
falling edge triggered at the same time, so I correct
logic operation to match this.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Correct SYS_CLOCK_HW_CYCLES_PER_SEC and
SYS_CLOCK_TICKS_PER_SEC to match our real setting value
for precise timing.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
When the Hardware Information Driver (HWINFO) provides a device ID
longer than the configured USB serial number, truncate the most
significant part instead of the least significant part. The lower part
is usually having more entropy, e.g. on STM32.
Fixes#34550
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add the missing includes to make the header more portable. It currently
requires other headers to be included before it.
Signed-off-by: Yuval Peress <peress@chromium.org>
SMP implementation across bt/udp does not check
if allocation of the buffer was successful.
If the buffer is not granted an error shall be
returned.
This patch fixes BUS FAULT issue when NULL
pointer is referenced.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This commit updates the supported features of stm32l5 and stm32wl boards
to match the devicetree configuration.
- add link to board defconfig and board.dts
- sort supported features table alphabethically by interface.
Additionally CRYP peripheral is added as supported feature to the
mikroe_mini_m4_for_stm32 board documentation.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The test sample.drivers.crypto.stm32 was built only for the stm32 crypto
driver (build_only: true).
This commit changes the configuration to run the test and adds regex for
the supported modes.
Additionally integration_platform native_posix is removed from the
crypto.stm32 test configuration, such that stm32 targets built in CI.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit uses filter instead of allow list for the
sample.drivers.crypto.stm32 test case.
As a result the ci test is not only built on mikroe_mini_m4_for_stm32,
but also on lora_e5_dev_board, nucleo_wl55jc and stm32l562e_dk.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds dt definitions for the hw aes accelerator
on stm32g0 Series.
The accelertor is available on the following socs:
stm32g041, stm32g061, stm32g081, and stm32g0c1.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds a dt node for the hw aes accelerator of the
stm32l5 series.
The stm32l562Xe.dtsi file now includes the newly created
stm32l562Xe.dtsi with the additional aes definitions instead of the
stm32l552Xe.dtsi file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds crypto support for several series which have
the same/very similar or same AES IP.
This includes G0, G4, L5, WL.
WB is also very similar but, expects the app to load the key via CKS.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds bindings for the STM32 AES accelerator.
Common properties of st,stm32-cryp are moved into
st,stm32-crypto-common.yaml.
The accelerator supports ECB, CBC, CTR, GCM, GMAC, and CCM
chaining modes.
128 bit bit data blocks with cipher key lengths of 128 and 256 bit are
supported.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Correct the wrong operand of clflush instruction. The old operand
points to a location inside stack and doesn't work. The new one
works well by taking linux kernel code as reference.
End address instead of size should get round up
Add Kconfig option to disable the usage of mfence intruction for
SoC that has clfulsh but no mfence supported.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
If BT_ISO is enabled we now compile conn.c which contains a
lot of functionality used by BT_ISO, even for broadcast-iso
builds, i.e. builds that do not require BT_CONN.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Change the guard such that the iso_mtu and iso_pkts are
not guarded by BT_CONN as they should be available for
iso broadcast-only builds.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Add the bt_acl_recv function that works similar to
bt_iso_recv but for ACL data only, simplying the
generic bt_conn_recv function.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Move the bt_conn_disconnect and conn_disconnect functions
to the ACL group.
Also adds a guard in the iso.c file for connected ISO.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Move the notify_le_phy_updated, notify_le_data_len_updated,
notify_le_param_updated, notify_remote_info,
notify_disconnected and notify_connected functions
to the ACL group.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Move the deferred_work callback function to the ACL group.
This also moves the static function conn_lookup_iso
which is only called form deferred_work.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Move the bt_conn_lookup_state_le, bt_conn_lookup_addr_le and
bt_conn_is_peer_addr_le functions to the ACL group.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Move the bt_conn_get_tx_power_level and
bt_conn_le_get_tx_power_level functions to the ACL group.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
