Commit graph

43671 commits

Author SHA1 Message Date
Andrew Boie
ffc1da08f9 kernel: add z_thread_single_abort to private hdr
We shouldn't be copy-pasting extern declarations like this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-02 15:02:06 -07:00
Andrew Boie
3425c32328 kernel: move stuff into z_thread_single_abort()
The same code was being copypasted in k_thread_abort()
implementations, just move into z_thread_single_abort().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-02 15:02:06 -07:00
Andrew Boie
e34ac286b7 arm: don't lock irqs during thread abort
This isn't needed; match the vanilla implementation
in kernel/thread_abort.c and do this unlocked. This
should improve system latency.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-02 15:02:06 -07:00
Andrew Boie
0a99011357 arm: thread_abort: clarify what's going on
A check was being done that was a more obscure way of
calling arch_is_in_isr(). Add a comment explaining
why we need to trigger PendSV.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-02 15:02:06 -07:00
Dominik Ermel
d7b0ceb6a1 west.yml: Snapshot update of mcumgr from upstream
This commit updates mcumgr with latest snapshot from the upstream.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-09-02 15:44:18 -05:00
Henrik Brix Andersen
a625d48836 CODEOWNERS: add additional code owner for EEPROM tests
Add myself as code owner for the EEPROM test suites.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-02 16:22:52 -04:00
Peter A. Bigot
0839f38451 drivers: console: fix Kconfig DTS inference for mcumgr uart
The conversion last year mixed up uart-pipe with uart-mcumgr.  Revert
to the pre-conversion relationship.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-09-02 14:56:19 -05:00
Fabio Utzig
eb2854aabe west: update mcuboot revision
Update MCUBoot to latest revision to fix issue with const struct
device.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-09-02 15:28:24 -04:00
Peter Bigot
669a0d6f5b drivers: eeprom: reduce priority of at2x initialization
The default priority for I2C controller initialization is POST_KERNEL
60 (SPI 70), while the default priority for device configuration is
POST_KERNEL 50.  Thus the EEPROM is being initialized before its
controller.  While for this driver that wouldn't be an issue recent
changes mean the device lookup returns NULL before the device is
initialized.

Change the AT2X priority to 75 so it falls between the I2C and SPI
drivers and the default ethernet priority (80), since some ethernet
controllers may store the MAC address in EEPROM.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-09-02 15:27:57 -04:00
Peter Bigot
039e3edcda Revert "posix: linker: Wrap rodata and rwdata in sections."
This reverts commit b51eeb03f4.

The linker script is now putting read-only material in writable
segments, which causes glib with -D_FORTIFY_SOURCE=2 to abort.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-09-02 14:46:01 -04:00
Kumar Gala
69b5445016 CODEOWNERS: Update for dts/scripts
@ulfalizer hasn't been active for several months, remove him and add
@mbolivar-nordic.  We can add @ulfalizer back if he comes back to the
project.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-09-02 14:44:57 -04:00
Kumar Gala
7d04c2ef86 CODEOWNERS: Fix github username change
Change @mbolivar to @mbolivar-nordic.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-09-02 14:44:57 -04:00
Flavio Ceolin
03d70b2ca3 lib: hex: Remove constant expression
Part of an else expression was constant, just removing it.

Code guideline rule 14.3

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 13:45:50 -04:00
Flavio Ceolin
1396e89e6c os: work_q: Use NULL instead of 0
Code guideline rule 11.9 says to use macro NULL for null pointers.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 13:45:50 -04:00
Flavio Ceolin
86d8475850 osdp: Remove invald serial option
SERIAL_HAS_DRIVER and UART_INTERRUPT_DRIVEN should be selected by the
driver. If something needs is should dependson these options.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 13:45:26 -04:00
Flavio Ceolin
2fde557e14 osdp: Do not select ENTROPY_GENERATOR
Entropy generator is not used in this subsystem so there is no need to
select it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 13:45:26 -04:00
Flavio Ceolin
61b2cdd0dd osdp: Do not use TEST_RANDOM_GENERATOR
TEST_RANDOM_GENERATOR should not be used in subsystems because it does
not generate truly random numbers. This is indented to be used only
for tests purpose.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 13:45:26 -04:00
Anas Nashif
209e4ee1a1 boards: mec1501modular: build without image gen tool
Do not quit if there is no image generation tool, just report the issue
and continue. Happens on MacOS where there is no tool for generation the
SPI image.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-02 13:28:13 -04:00
Peter Bigot
478577e04a driver: interrupt_controller: miwu: fix build errors from device const
Declaration within a macro was missed during conversion.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-09-02 19:01:28 +02:00
Jukka Rissanen
4f6145a478 net: tcp2: Fix connection close seq values
When connection is closed and we send ACK flag, use proper seq
values so that any data that is still in flight will get acked too.
Currently this assumes that window is still open.

Fixes #27876

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-09-02 18:49:35 +03:00
Hake Huang
24acf1024d board: mimxrt685_evk update flash command
add reset after download, which will trigger board to run

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-09-02 09:42:29 -05:00
Henrik Brix Andersen
73288835ec tests: arch: arm: irq_advanced_features: remove Arty Cortex-M1 handling
Remove special handling of the ARM Cortex-M1 DesignStart FPGA reference
design running on the Digilent Arty after CONFIG_NUM_IRQS was reduced
from 8 to 7.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
ba2bafc80d boards: arm: arty: reduce number of IRQs from 8 to 7
The ARM Cortex-M1/M3 DesignStart FPGA reference designs both use IRQ 7
(the last IRQ line) as a level-detect non-interrupt signal to determine
whether the V2C-DAPLINK shield is installed. Thus IRQ 7 cannot be used
as a regular IRQ line.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
db6737b34a tests: arch: arm: irq_advanced_features: check irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
aab95f09f2 samples: drivers: spi_flash: add support for arty_a7_arm_designstart_m3
Add support for running the JEDEC SPI NOR flash sample on the ARM
Cortex-M3 DesignStart FPGA reference implementation.

Special care is needed to avoid overwriting part of the FPGA
configuration bitstream, which is stored in the onboard QSPI flash.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
80cb465a89 boards: arm: arty: add arm cortex-m3 designstart fpga board definition
Add board definition for the ARM Cortex-M3 DesignStart FPGA reference
design running on the Digilent Arty development board.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
77da848d7b boards: arm: arty: add missing cpu node to devicetree
Add the missing Cortex-M1 CPU node to the devicetree.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
4fe779848f boards: arm: arty: refactor board definition to prepare for cortex-m3
Refactor the ARM Cortex-M1 DesignStart FPGA/Digilent Arty A7 board
definition to prepare for Cortex-M3 support.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
140841fc73 soc: arm: arm: designstart: add cortex-m3 designstart fpga support
Add support for the ARM Cortex-M3 DesignStart FPGA SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Ioannis Glaropoulos
acfb66b6f4 tests: arch: arm: add test for IRQ Target state management
We add a simple test-case for verifying the behavior of the
Cortex-M IRQ target state management. We add an additional
test only for TrustZone-enabled Cortex-M targets running
in Secure mode. We explicitly exclude ARMv8-M platforms that
enable Non-Secure FW build by default from running the test.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-02 15:01:30 +02:00
Ioannis Glaropoulos
e08dfec77c arch: arm: cortex-m: add ARM-only API to set all IRQS to Non-Secure
We implement an ARM-only API for ARM Secure Firmware,
to set all NVIC IRQ lines to target the Non-Secure state.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-02 15:01:30 +02:00
Ioannis Glaropoulos
4ec7725110 arch: arm: cortex-m: Modify ARM-only API for IRQ target state mgmt
we modify the ARM Cortex-M only API for managing the
security target state of the NVIC IRQs. We remove the
internal ASSERT checking allowing to call the API for
non-implemented NVIC IRQ lines. However we still give the
option to the user to check the success of the IRQ target
state setting operation by allowing the API function to
return the resulting target state.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-02 15:01:30 +02:00
Alexandre Bourdiol
51d4b4d5f4 drivers: flash: stm32wb: rework dualcore flash operation
Implement algorithm described in STM32 AN5289
with implementation proposed in STM32 Cube Application:
BLE_RfWithFlash

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-02 14:13:49 +02:00
Alexandre Bourdiol
5deb8ffe0c drivers: STM32: Rework CLK48 HSEM protection
Due to HSEM implementation #24862, USB CLK48 lock implementation
#25850 should be reworked.
And by the way, implement the same in entropy which is using the
same clock.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-02 14:13:49 +02:00
Alexandre Bourdiol
6bc559bdaa soc: arm: st_stm32: update HSEM ID from STM32WB cube update
New Hardware semaphore ID have been defined in STM32WB cube

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-02 14:13:49 +02:00
Anas Nashif
45ef9e85a7 boards: faze: should not be declared as a default test platform
This was probably added by mistake, this is not a default  platform that
needs to build every single test we have on each PR.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-02 07:49:29 -04:00
Tomasz Bursztyka
d431b56587 west: Update module's revision
These revisions have the right fix for device const-ification.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
dcf89f4990 doc: Add a device qualifier change entry to release-notes for 2.4 version
Documenting the change.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
ef560e0a53 drivers: Manual const-ification of device driver instance
These are all the case that coccinelle cannot find as they are inside
macro declarations.

Fixed via:

git grep -rlz -E "\(struct device \*" |
	xargs -0 sed -i 's/(struct device/(const struct device/g'

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
26cbd6a58c tests: uart_asyn: Simplify how the UART device is provided
Just get it once as device_get_binding() is a bit greedy.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
4dcfb5531c isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs

This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.

Note that only the ISR passed to IRQ_CONNECT are of interest here.

In order to do so, the script fix_isr.py below is necessary:

from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os

cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
(
 const struct device *D = (const struct device *)P;
|
 const struct device *D = P;
)
 ...
}

@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
 const struct device *D;
 ...
(
 D = (const struct device *)P;
|
 D = P;
)
 ...
}

@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
 ...
}

@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);

@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
 ...
}

@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
 ...
}
"""

def find_isr(fn):
    db = []
    data = None
    start = 0

    try:
        with open(fn, 'r+') as f:
            data = str(mmap.mmap(f.fileno(), 0).read())
    except Exception as e:
        return db

    while True:
        isr = ""
        irq = data.find('IRQ_CONNECT', start)
        while irq > -1:
            p = 1
            arg = 1
            p_o = data.find('(', irq)
            if p_o < 0:
                irq = -1
                break;

            pos = p_o + 1

            while p > 0:
                if data[pos] == ')':
                    p -= 1
                elif data[pos] == '(':
                    p += 1
                elif data[pos] == ',' and p == 1:
                    arg += 1

                if arg == 3:
                    isr += data[pos]

                pos += 1

            isr = isr.strip(',\\n\\t ')
            if isr not in db and len(isr) > 0:
                db.append(isr)

            start = pos
            break

        if irq < 0:
            break

    return db

def patch_isr(fn, isr_list):
    if len(isr_list) <= 0:
        return

    for isr in isr_list:
        tmplt = cocci_template.replace('<!fn!>', isr)
        with open('/tmp/isr_fix.cocci', 'w') as f:
            f.write(tmplt)

        cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]

        subprocess.run(cmd)

def process_files(path):
    if path.is_file() and path.suffix in ['.h', '.c']:
        p = str(path.parent) + '/' + path.name
        isr_list = find_isr(p)
        patch_isr(p, isr_list)
    elif path.is_dir():
        for p in path.iterdir():
            process_files(p)

if len(sys.argv) < 2:
    print("You need to provide a dir/file path")
    sys.exit(1)

process_files(Path(sys.argv[1]))

And is run: ./fix_isr.py <zephyr root directory>

Finally, some files needed manual fixes such.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
5c9dd0de78 drivers: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
fd6fbe9c5f boards: Apply IRQ offload API change
Switching to constant parameter on ISR handler.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
50edd19f3a tests: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
93cd336204 arch: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
6df8b3995e irq: Change dynamic API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
4b9134d8d2 tests: Apply IRQ offload API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
ae5a761f85 kernel: Apply IRQ offload API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
7def6eeaee arch: Apply IRQ offload API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
84942e4fbc irq: Change offload API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00