Add Kconfig option for indicating that a given SoC contains the NXP
MCAN CAN FD controller.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Event FIFO start address (EFSA) field within the Tx event FIFO
configuration register (TXEFC) occupies bit 15:2.
Change the CAN_MCAN_TXEFC_EFSA_POS definition to reflect this.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename a few CAN API functions for clarity and consistency with other
Zephyr RTOS APIs.
CAN_DEFINE_MSGQ() becomes CAN_MSGQ_DEFINE() to match K_MSGQ_DEFINE().
can_attach_isr() becomes can_add_rx_filter() since a filter callback
function is not an interrupt service routine (although it is called in
isr context). The word "attach" is replaced with "add" since filters are
added, not attached. This matches the terminology used is other Zephyr
APIs better.
can_detach() becomes can_remove_rx_filter() to pair with
can_add_rx_filter().
can_attach_msgq() becomes can_add_rx_filter_msgq() and documentation is
updated to mention its relationship with can_add_rx_filter().
can_register_state_change_isr() becomes can_set_state_change_callback()
since a state change callback function is not an interrupt service
routine (although it is called in isr context). The word "register" is
replaced with "set" since only one state change callback can be in
place.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
duplex and frame_format where recently added and obviously need to be
grabbed from DTS relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Better setting a default value there so DT_PROP() will return something
relevant whether the property is set or not.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
with this config, the testcase PASSED on the nucleo_h743zi
using DMA for SPI transfer (through DMAMUX request)
Connect pins D11 and D12 on the ARDUIno connector CN7
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch controls the SPI of the stm32H7 mcu when using
the DMA transfer. Starting and ending the transfer
are specific according to the RefMan.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A generic function is used to give the register address to the DMA.
The SPI of the stm32H7 serie has two data registers for Tx and Rx
When the DMA is getting the address it differs between Rx and Tx.
As the stm32cube/stm32h7xx/drivers/include/stm32h7xx_ll_spi.h
has no such LL functions, the register address is get direclty.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The spi_stm32_complete() is checking spi flags which are valid when the
intance is still enable: disable afterwards. No more need to disable
the DMA transfer then
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Defines a function to control the spi busy state during DMA transfer.
After the DMA Tx, the spi might still have some data to Transmit.
The driver must wait for the SPI Tx before sending the next packet.
This is not required for the Rx part as the DMA Rx is already done.
Some mcus like stm32H7 have a TX complete bit, other must wait for the
TXE and BSY line.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable timer0 and its pwm node. The board does not directly have any LED
connected to a PWM output. However, following the official
"TIMER_Breath_LED" example, user can bridge PA8 (TIMER0_CH0) to PF0
(LED2) to run quick samples such as samples/basic/blinky_pwm.
Note that a prescaler value of 256 has been chosen so that basic PWM
samples (blinky_pwm and fade_led) can be run. This value may be
overriden in specific samples if needed.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Enable timer1 and its pwm node. The board does not directly have any LED
connected to a PWM output. However, following the official
"TIMER_Breath_LED" example, user can bridge PB10 (TIMER1_CH2) to PE2
(LED1) to run quick samples such as samples/basic/blinky_pwm.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Initial version of a PWM driver for GigaDevice GD32 SoCs. Only PWM
output is supported for now (no capture support).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add timer and pwm nodes. The structure follows a similar approach to the
one used by STM32. Timer nodes store all timer information (e.g.
pre-scaler), whereas the pwm nodes are children of the timer node
indicating a specialization of the multiple timer functionalities.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add timer and pwm nodes. The structure follows a similar approach to the
one used by STM32. Timer nodes store all timer information (e.g.
pre-scaler), whereas the pwm nodes are children of the timer node
indicating a specialization of the multiple timer functionalities.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The document is now structured into the three different APIs. In
addition to that, a section for relevant Kconfig options is added.
Signed-off-by: Martin Jäger <martin@libre.solar>
- Introduce Doxygen groups for the different APIs (polling, interrupt-
driven, asynchronous).
- Hide internal driver API as it confuses the average user.
- Move Async API to the bottom so that the file is ordered from generic
to more specific/sophisticated functions.
No code was changed.
Signed-off-by: Martin Jäger <martin@libre.solar>
`bt_gatt_cancel` takes a `bt_gatt_.._params` pointer. The `params`
pointer is mistakenly passed on to `bt_att_req_cancel`, which expects a
`bt_att_req`.
This change makes bt_gatt_cancel locate the `req` and pass that to
`bt_att_req_cancel`.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Co-authored-by: Emil Gydesen <Thalley@users.noreply.github.com>
In include/sys/device_mmio.h, replacing <toolchain/common.h>
fixes the following warning:
$ west build -b qemu_x86 tests/arch/x86/static_idt/
In file included from zephyr/include/toolchain.h:50,
from zephyr/include/linker/section_tags.h:12,
from zephyr/include/linker/sections.h:132,
from zephyr/include/sys/device_mmio.h:19,
from zephyr/include/drivers/interrupt_controller/loapic.h:14,
from zephyr/include/drivers/interrupt_controller/sysapic.h:10,
from zephyr/include/arch/x86/arch.h:231,
from zephyr/include/arch/cpu.h:15,
from zephyr/tests/arch/x86/static_idt/src/test_stubs.S:17:
zephyr/include/toolchain/gcc.h:61: error: BUILD_ASSERT redefined [-Werror]
61 | #define BUILD_ASSERT(EXPR, MSG...) _Static_assert(EXPR, "" MSG)
|
In file included from zephyr/include/sys/device_mmio.h:18,
from zephyr/include/drivers/interrupt_controller/loapic.h:14,
from zephyr/include/drivers/interrupt_controller/sysapic.h:10,
from zephyr/include/arch/x86/arch.h:231,
from zephyr/include/arch/cpu.h:15,
from zephyr/tests/arch/x86/static_idt/src/test_stubs.S:17:
zephyr/include/toolchain/common.h:165: note: this is the location of the
previous definition
165 | #define BUILD_ASSERT(EXPR, MSG...) \
<toolchain.h> provides a compiler-specific BUILD_ASSERT.
<toolchain/common.h> provides a generic, fallback BUILD_ASSERT and
should probably never be included directly.
Thanks to Gerard Marull-Paretas for recommending this fix.
Related to commit af20208cd9 ("devices: mark device MMIO declarations
to boot/pinned sections") that added #include <linker/sections.h>
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Fixes: #41435
Remove build host specific escaping of start symbol command argument.
The start symbol for armlink is: Image$$device$$Base
and were escaped as: Image\\$$\\$$device\\$$\\$$Base
However, the $ must only be escaped in Linux and MacOS, not on windows
hosts.
Instead of escaping the start symbol in the CMake code then it is better
to use the VERBATIM flag on `add_custom_command()` which ensures correct
escaping for the build host.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #41435
The use of %<symbol>% works well in Linux and MacOS but when passed
to the linker script generator in Windows the %<symbol>% is processed
by the windows shell causing the value to disappear and thus an empty
value inside the generated ld linker script or scatter file.
This is fixed by using the @ character instead of the % character.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
HSE clock frequency value depends on target.
It can't be defaulted.
Remove this property to ensure it is set properly for each target.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To ease maintenance, add a common section.
It appears that using DTC_OVERLAY_FILE in the common section
preserves the required overlay order.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on default board configuration,
add a specific test for this config.
Additionally rename existing pll_msi_80 to pll_msis_160.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on existing board clock configuration,
use a clear_clocks.overlay file to first reset the clock
configuration to the default .dtsi state, then apply a
new configuration.
This method should be more robust when trying to use on more
boards and has the benefit to provide correct configuration
examples.
This relies on the fact that overlays are applied in the order
they are provided in DTC_OVERLAY_FILE CMake variable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
NPCX7/9 has a different ADC register structure. NPCX7 has 3 threshold
detectors from offset 0x14 & has 10 input channels. NPCX9 has 6
threshold detectors from offset 0x60 & has 12 input channels.
This commit fixes the NPCX ADC register structure.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
