michaelh/zephyr

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Author	SHA1	Message	Date
Keith Packard	f623571a73	riscv: Initialize TP register when starting threads Set TP in exception context so that it gets loaded into the CPU when first running the thread. Set TP for secondary cores to related idle TLS area. Signed-off-by: Keith Packard <keithp@keithp.com>	2022-04-28 11:09:01 +09:00
Ederson de Souza	2aab236c12	arch/riscv: Add IPI support Use CLINT to send interrupts to another CPU. SMP support is kinda incomplete without it. This patch only enables it for riscv-privilege platforms - specifically, "virt" one. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>	2022-02-25 19:13:50 -05:00
Ederson de Souza	d9ab35577b	arch/riscv: Boot secondary CPUs for SMP support Secondary CPUs are now initialised and made available to the system. If the system has more CPUs than configured via CONFIG_MP_NUM_CPUS, those are still left looping as before. Some implementations of `soc_interrupt_init` also changed to use `arch_irq_lock` instead of `irq_lock`. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>	2022-02-25 19:13:50 -05:00

Author

SHA1

Message

Date

Keith Packard

f623571a73

riscv: Initialize TP register when starting threads

Set TP in exception context so that it gets loaded into the CPU when
first running the thread. Set TP for secondary cores to related idle TLS
area.

Signed-off-by: Keith Packard <keithp@keithp.com>

2022-04-28 11:09:01 +09:00

Ederson de Souza

2aab236c12

arch/riscv: Add IPI support

Use CLINT to send interrupts to another CPU. SMP support is kinda
incomplete without it.

This patch only enables it for riscv-privilege platforms - specifically,
"virt" one.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>

2022-02-25 19:13:50 -05:00

Ederson de Souza

d9ab35577b

arch/riscv: Boot secondary CPUs for SMP support

Secondary CPUs are now initialised and made available to the system. If
the system has more CPUs than configured via CONFIG_MP_NUM_CPUS, those
are still left looping as before.

Some implementations of `soc_interrupt_init` also changed to use
`arch_irq_lock` instead of `irq_lock`.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>

2022-02-25 19:13:50 -05:00

3 commits