Commit graph

10062 commits

Author SHA1 Message Date
Andrzej Głąbek
165c14dc60 drivers: pwm_nrfx: Fix handling of zero length periods
When the driver was called to set the period length for a channel
to 0, it set the COUNTERTOP register in the PWM peripheral to 0,
what resulted in an undefined behavior of the peripheral (and lack
of the STOPPED event sometimes).
The PWM API does not precise how should a zero length period be
handled; some drivers return the -EINVAL error in such case, some
do not. This patch fixes the pwm_nrfx driver so that it does not
change the previously used COUNTERTOP register value when the period
length is set to 0, and because the pulse cycles are always limited
by the driver to period cycles (so 0 in this case), in result the
relevant channel is simply deactivated. This allows users to switch
off a channel by requesting the pulse width to be set to 0 without
providing a non-zero period in such call.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-10-08 13:06:40 +02:00
Tim Lin
41c9b71450 ITE: soc: add cpu idle task
Implement the CPU idle task. The system should enter this task when
there is no any task to ensure power saving.

Tested on it8xxx2_evb board. It will reduce 12.5mA when system enters
the CPU idle task.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-10-08 13:01:06 +02:00
Erwan Gouriou
19a40a15b6 drivers/usb: stm32: Deprecate 'enable-pin-remap'
'enable-pin-remap' is deprecated in favor of 'remap-pa11-pa12' from
'st-stm32-pinctrl'.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-07 15:38:53 -04:00
Gerard Marull-Paretas
f3fbff6ecb drivers: pinmux: stm32: remove unused init priority
The device initialization priority is not used, so remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-07 15:38:53 -04:00
Erwan Gouriou
e1b905d6bc drivers: pinmux: stm32: add support for PA11/12 remap.
STM32G0/F0 SoCs allow to remap PA11/12 to PA9/10. Some boards
were manually configuring this remap. This patch centralizes this
functionality to the pinmux driver, allowing boards to enable the
remap directly in board dts file.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-07 15:38:53 -04:00
Erwan Gouriou
1ec41ce922 drivers/clock_control: stm32u5: Fix VCO setting
When existing stop mode 1&2, VCO is set to range 4
and should be set back to range 1 to allow full speed
operations.
Rather than setting VCO at startup, set it inside clock
setting procedure so that it could done
in clock reset procedure when existing stop modes.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-07 15:38:40 -04:00
Erwan Gouriou
dcac61631d drivers/timer: stm32 lptim: Update for u5 series support
Adapt lptim driver implementation to support stm32u5 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-07 15:38:40 -04:00
Jani Hirsimäki
f2859f9501 drivers: wifi: esp_at: changes to scanning
If CONFIG_WIFI_ESP_AT_SCAN_MAC_ADDRESS: mac addr included in
scanning results.
if CONFIG_WIFI_ESP_AT_SCAN_PASSIVE: passive scanning is used instead of
default active scanning.
If CONFIG_WIFI_ESP_AT_SCAN_RESULT_RSSI_ORDERED: scanning response
ordered by RSSI.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2021-10-07 10:55:37 +02:00
Armando Visconti
a2f3ea5d19 drivers/sensor: lsm6dso: Prevent device entering I3C
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. It might happen that after a board
reset the logical level '1' is preserved (maybe a level shifter)
forcing the LSM6DSO to enter erroneously in I3C mode, breaking any
attempt to communicate with it. (Fix #38902)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-10-06 22:22:09 -04:00
Marcin Niestroj
87ac114571 drivers: wifi: esp_at: fix connect to open network
According to ESP-AT documentation ([1] for version before 2.0 and [2]
for version 2.1) of AT+CWJAP command, both SSID and PSK are required.
Even for newest ESP-AT release 2.2 ([3]) "," (comma) is needed even if
SSID or PSK are not explicitly provided.

Send 'AT+CWJAP="SSID",""' instead of 'AT+CWJAP="SSID"' when connecting
to open WiFi network, to follow AT commands documentation.

Tested with ESP-AT firmware 2.1.

[1] https://www.espressif.com/sites/default/files/documentation/4a-esp8266_at_instruction_set_en.pdf
[2] https://github.com/espressif/esp-at/blob/release/v2.1.0.0_esp8266/docs/en/AT_Command_Set/Wi-Fi_AT_Commands.md#atcwjapconnects-to-an-ap
[3] https://github.com/espressif/esp-at/blob/release/v2.2.0.0_esp8266/docs/en/AT_Command_Set/Wi-Fi_AT_Commands.rst#refatcwjap-wifi-at-connect-to-an-ap

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-10-06 20:44:34 -04:00
Daniel Leung
ed83474b10 interrupt_controller: remove CONFIG_DW_ICTL_OFFSET
This kconfig is only used for one board and is simply an alias
to another kconfig. So remove CONFIG_DW_ICTL_OFFSET and apply
the value directly to the other kconfig.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-10-06 19:43:48 -04:00
Marcin Niestroj
47e10a6830 drivers: lora: fix RtcGetCalendarTime()
Uptime in milliseconds is assigned to uint32_t variable, which results
in integer overflow after enough time has expired. Additionally
milliseconds part (which should be 0-999) is assigned directly from
uptime, without subtracting full seconds.

Fix both issues by using int64_t variable and calculating milliseconds
with modulo.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-10-05 19:24:58 -04:00
Felipe Neves
ed55ee95e9 boards: riscv: esp32c3: added button support
in samples for esp32c3 devkitm_board using GPIO9

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-05 19:24:38 -04:00
Felipe Neves
9768e98001 drivers: gpio_esp32: added support for esp32c3
in the gpio drivers and pinmux for esp32 chip series

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-05 19:24:38 -04:00
Jordan Yates
29773391c7 spi: convert CS usage to gpio_dt_spec
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Francois Ramu
33e0f1a87a drivers/spi: stm32u5 spi support
Add the specific driver functions for the SPI
of the stm32u5 device.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-05 19:23:37 -04:00
Manojkumar Subramaniam
d79d26f1ae drivers: serial: stm32: renable IT RXNE as part of graceful disable
async_rx_disable does not re-anable RXNE interrupt, it was disabled
during async_rx_enable

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2021-10-05 19:19:16 -04:00
Igor Knippenberg
bd7b7a6423 drivers: sensors: fdc2x1x: removed unused fdc2x1x_data
Removing two unused "struct fdc2x1x_data" to fix warnings
when compiling with PM_DEVICE=y.

Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
2021-10-05 13:13:46 -04:00
Evgeniy Paltsev
6807e02655 ARC: IRQ: drop excessive PM_DEVICE hooks
All ARC CPUs (supported by Zephyr) don't lose core interrupt
controller configuration after switching to sleep mode / modes,
so we don't need to save & restore it's configuration with PM.

This PM code most likely was added for Arduino 101 (Genuino 101)
board which isn't supported by Zephyr anymore - so we can drop
it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-05 07:48:47 -04:00
Evgeniy Paltsev
e1455fafdf ARC: IRQ: drop unused _VectorTable declaration
We don't use '_VectorTable' in the driver, so let's drop it's
declaration.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-05 07:48:47 -04:00
Daniel Leung
ef0d955758 uart: ns16550: add workaround to re-enable interrupts in ISR
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-10-04 20:49:13 -04:00
Krzysztof Chruscinski
cf3dabedaf drivers: gpio: nrf: Remove CONFIG_GPIO_NRF_P0 and CONFIG_GPIO_NRF_P1
Remove Kconfig options for enabling device instances in favor of
taking that information only from device tree. Prior to that
change there was a mix of devicetree and Kconfig.

Bring back use of CONFIG_GPIO_NRF_INIT_PRIORITY.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-10-04 20:48:20 -04:00
Bartosz Bilas
d6792dd7be drivers: gsm_ppp: introduce modem on/off callbacks
Allow the user to register function callbacks that
are executed during gsm modem configuring and stopping.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-04 20:46:04 -04:00
Tim Lin
213c0c43e6 ITE: soc: pull-down GPIO L/K groups and set GPIOH7 output low at default
GPIO L/K groups:
On IT81202 (128-pins package), the pins of GPIO group K and L aren't
bonding with pad. So we configure these pins as internal pull-down
at default to prevent leakage current due to floating.

GPIOH7:
On IT81202/IT81302, the GPIOH7 isn't bonding with pad and is left
floating internally. We need to enable internal pull-down for the pin
to prevent leakage current, but IT81202/IT81302 doesn't have the
capability to pull it down. We can only set it as output low,
so we enable output low for it at initialization to prevent leakage.

After setting: power saving=2.26mA

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-10-04 20:41:37 -04:00
Kevin Townsend
21321fba1c drivers: sensor: lsm303dlhc_mag: Fix gain factor
The magnetometer on the LSM303DLHC has a different gain conversion
factor for LSB to Gauss for the Z axis than it does for X, Y. This
commit takes into account the different conversion factors, and
adds the correct coefficients for each gain setting and axis.

Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
2021-10-04 20:40:43 -04:00
Francois Ramu
1ebd6b579e driver: clock: stm32 clock control supports ahb_prescaler
This constraint on the AHB prescaler is removed.
The ahb-prescaler is allow from 1-512.
For stm32 common and stm32U5 devices.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-04 20:37:09 -04:00
Gerard Marull-Paretas
f371ae3cc5 drivers: pinmux: stm32: remove pre-DT API
Remove APIs used in the pre-DT era. In case manual access is required,
`stm32_dt_pinctrl_configure` can still be used as a shortcut with data
initialized in the expected format.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-04 20:36:17 -04:00
Tim Lin
15106009c5 ITE: drivers/i2c: returning negative values for error
Fixes: #38959

Currently, the I2C driver returns I2C status register value as error
code when error happen. This PR fixes returning system number and
the return values is negative for error.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-10-04 12:53:50 -04:00
Francois Ramu
e763061876 drivers: pinmux stm32F1 remap IP without changing the SWJ_CFG
Change the REMAP bits of the AFIO_MAPR of the stm32F1x soc
with local MACRO without changing the SWJ_CFG (write-only bits).
The serial wire JTAG configuration is taken from the Z_AFIO_REMAP
(value of the CONFIG_GPIO_STM32_SWJ_xxx))
and not read from the MAPR register.
It accesses to the MAPR register directly instead of LL functions.
Note that Remapping on the MAPR2 is not to change.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-04 11:44:22 -04:00
Erwan Gouriou
6b0199ac7d drivers/timers: stm32_lptim: Set LSI as default LPTIM clck source
Timer STM32 LPTIM currently supports 2 clocks sources: LSE & LSI.
LSE (external) is defined as default but its availability depends
on board support package and then may not be available.

This ends up in situations where users have LSE implicitly selected
while no crystal is available on board, leading to non functional
LPTIM.

To avoid this situation, makes LSI clock, which is always available
(since internal to the SoC), the default LPTIM source clock.
Then, default case will be functional. Users will then be able to
select LSE if needed.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-04 08:24:03 -04:00
Flavio Ceolin
d55c9b6d54 console: uart: Don't re-define functions as macros
Some functions were being re-defined as macros if certain conditions
were not met.

Fix violations to rule 5.5

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-10-02 14:34:14 -04:00
Flavio Ceolin
419fabdad0 console: uart: Remove unnecessary macro
console_input_init is only used in the same scope it is implemented.
There is not need to have it defined elsewhere.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-10-02 14:34:14 -04:00
Felipe Neves
949a6a8e53 interrupt-controller: intc_esp32c3: make logs optional
Allowing cleaner debug experience and preventing unwanted
outputs during debug.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Felipe Neves
16be75b68f dts: added dts binding for esp32c3
interrupt controller, also places its relevant
peripheral sources allowing drivers to use the
DT macros instead of espressif headers.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Felipe Neves
b97c2da2f2 interrupt_controller: intc_esp32c3: added intc driver
For esp32c3 and replaces the hardcoded interrupt
attaching procedures with this new driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Sjors Hettinga
7f9b4d807c drivers: modem: Fix reference to stack in modem_context_sprint_ip_addr
Changes the modem_context_sprint_ip addr to write into a provided
buffer. This approach fixes a referencing to a non existing stack
variable, without using a lot of stack space.
Tested using the by building all used modems and tested on HW using
IPv4.

Fixes: #38459

Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
2021-10-01 11:06:32 -04:00
Glauber Maroto Ferreira
c7ce4b2016 esp32s2: drivers: entropy: add support
also needed for wifi driver support.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-01 10:51:37 -04:00
Eduardo Montoya
f397e9b6c2 drivers: nrf5: fixes for the CSL Receiver
Introduce fixes for making the CSL Receiver to properly schedule
the reception window.

Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
2021-10-01 11:37:38 +02:00
Sylvio Alves
69311ccc3d soc: esp32: update clock configuration calls
Removed duplicated calls in clock subsystems.
Move proper includes to soc specific.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-09-30 21:42:20 -04:00
Christopher Friedt
c4ecd78ce1 Revert "drivers: spi: stm32 can support TI mode for the SPI frame format"
This reverts commit d563313ab1.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-09-30 16:04:37 -04:00
Felipe Neves
d4ed7f69d4 drivers: entropy: esp32: enable rng driver
for esp32c3 allowing wifi subsystem to use inside
its driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-09-30 06:39:55 -04:00
Francois Ramu
d563313ab1 drivers: spi: stm32 can support TI mode for the SPI frame format
Depending of the soc and SPI peripheral, the Frame-Format of the
SPI can be configured to support TI or Motorola protocol.
This is configured through a new DTS property.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-29 14:47:31 -04:00
Andrzej Głąbek
5473b22275 drivers: i2s_nrfx: Fix a few minor fixes
- correct the names of buffers used by message queues so that it
  is possible to have multiple instances of the driver (in case
  such need appears in the future)
- make `stop` and `discard_rx` normal structure members, not bit
  fields, as they are modified in the interrupt handler and that
  could lead to overwriting of other bit fields located in the
  same memory unit
- add a log message providing the actual frame clock (WS) frequency
  (i.e. PCM rate) that the driver was able to configure (due to
  hardware limitations, it is not always possible to achieve the
  exact requested frequency and the driver selects the closest one
  available, so make it more visible to users

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-29 14:46:29 -04:00
Andrzej Głąbek
953f35f130 drivers: i2s_nrfx: Do not enforce two channels for I2S format
Remove unnecessary condition that effectively limits the usability
of the I2S format to two channels mode only.
Although the description of the `i2s_config` structure contains
a remark that for the I2S format the specified number of channels
is ignored and always two are used, in fact only one other in-tree
driver (i2s_sam_ssc) applies such limitation.
The nRF I2S hardware has no problem with handling the I2S format
with audio data for only one channel, so there is no need for having
this limitation in the driver, and without such mode of operation of
the driver it is impossible to feed it with PCM data directly from
the PDM peripheral working in one channel mode.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-29 14:46:29 -04:00
Pieter De Gendt
4e2bb0e762 drivers: hwinfo: add reset cause support for iMX RT series
Add a shim driver to get/clear the reset reason on NXP i.MX
RT controllers

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-09-29 14:44:21 -04:00
Robert Lubos
0dbdcc770d net: sockets: Add socket processing priority
When creating a socket, all of the registered socket implementation are
processed in a sequence, allowing to find appropriate socket
implementation for specified family/type/protocol. So far however,
the order of processing was not clearly defined, leaving ambiguity if
multiple implmentations supported the same set of parameters.

Fix this, by registering socket priority along with implementation. This
makes the processing order of particular socket implementations
explicit, giving more flexibility to the user, for example when it's
neeed to prioritze one implementation over another if they support the
same set of parameters.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-09-28 20:11:26 -04:00
Dawid Niedzwiecki
1031cfd51e drivers: serial: ns16550: fill full fifo
Put the maximum number of bytes into Tx FIFO in the fill_fifo routine
to reduce CPU usage.

Previously, the THRE bit was checked in a loop, but, according to doc -
"In the FIFO mode, it is set when the XMIT FIFO is empty, and is
cleared when at least one byte is written to XMIT FIFO.", so only one
byte was transferred every interrupt. That was generating a big amount
of interrupts, which consumes CPU time.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2021-09-28 20:10:00 -04:00
Markus Fuchs
a283cb3311 drivers: Update drivers to use new multicast monitor API
Update drivers regarding latest multicast group join/leave monitor
changes which now supports both IPv6 and IPv4 multicast addresses.

Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
2021-09-28 20:04:49 -04:00
Alex Sergeev
851cccb67e drivers: ethernet: mcux: generalize gPTP code to support PTP L2
Update eth_mcux.c to use CONFIG_NET_L2_PTP instead of CONFIG_NET_GPTP.

Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
2021-09-28 20:01:16 -04:00
Gerard Marull-Paretas
222a21dd72 drivers: pinmux: stm32: use DEVICE_DT_GET_OR_NULL
Use existing Devicetree macro to obtain optional references to GPIO
ports.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-28 20:00:00 -04:00