Add several default mpu regions(flash/sram/sram_text/sram_ro) for
the Armv8-R aarch64 based Soc.
These regions will be initialized as static region during system boot.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
When MPU is enabled, the sections need to be 64 bytes aligned.
In the case of MMU, BSS section will be 4k aligned, because the first
variable in BSS section 'base_xlat_table' is explicitly aligned by
'__aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t))'.
However, with MPU, we do not have such a variable. So it's necessary
to fix the alignment of the BSS section in the linker.ld
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Armv8-R AArch64 MPU can support a maximum 16 memory regions, and the
actual region number can be retrieved from the system register(MPUIR)
during MPU initialization.
Current MPU driver only suppots EL1.
Signed-off-by: Haibo Xu <haibo.xu@arm.com>
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
According to Armv8-R64 Spec, MPU related meta data(region base/limit)
is 64 bits. So we need to re-define MPU related data structure here.
Signed-off-by: Haibo Xu <haibo.xu@arm.com>
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Use -march=armv8.4-a to compile zephyr on cortex-R82.
Because Cortex-R82 has not been enabled in GCC 10.x currently.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Add arm fvp emulator in order to use ninja run or west build -t run.
Add armfvp in order to run twister.
Set env ARMFVP_BIN_PATH before using it,
e.g. export ARMFVP_BIN_PATH=<path/to/fvp/dir>
NOTE: ARMFVP_BIN_PATH is the dir path.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Add essential files to create a new soc.
Introduce a new type of soc series named fvp_aemv8r.
Add a new soc named fvp_aemv8r_aarch64.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Add Cortex-R82 config to support the Cortex-R82 processor.
Introduce the new CPU_CORTEX_R_AARCH64 config for the Cortex-R 64-bit
processor.
Since the current CPU_CORTEX_R config has already been bound for
AArch32 in many test cases, we therefore add a new CPU_AARCH64_CORTEX_R
to distinguish from the Cortex-R 32-bit processor.
We do not use CPU_CORTEX_R64 because this name will lead to ambiguity
with processor name like Cortex-R82.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
If default config ARM_MMU is set to n, samples/tests will have
compilation error. This is because the arch/arm/aarch64/arm_mmu.h
is always included.
Signed-off-by: Henry Wang <Henry.Wang@arm.com>
When printing the unassigned values the 'sym' variable is
used as a dict from which we try to get the 'name' value.
However, 'symbols['unassigned']' gives a list of keys, so
we get an 'TypeError' when trying to access ['name'] of
a string (the key).
Fix this issue by iterating over the values from
the 'symbols['unassigned']' dict instead.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
As of today we use second register bank only if fast interrupts are
enabled. So don't show the 'number of register bank' configuration
option if fast interrupts are disabled to avoid user confusion.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This option enables BT_TICKER_SLOT_AGNOSTIC which eliminates
priorities and collision resolving in the ticker.
Event scheduling states are stored in the lll_hdr, and event priority
is passed from LLL implementation, and runtime priority calculated.
LLL implementation decides whether to program radio, start preemption
timer, and/or queue prepare in the prepare pipeline.
Event arbitration is made possible via the common LLL, but not yet
implemented in Nordic LLL.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Priority in the legacy stack has been unused and "work in progress" for
some time. With this commit, the priority passing/handling is cleaned
up, preparing for the new JIT scheduling priority handling.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Split lll_prepare and lll_resume from Nordic LLL to common file for
reuse by all vendors. The split also supports new JIT Scheduling by
defining a common place to calculate event prepare priority.
The module may also house other common parts of the LLL currently
re-implemented identically by vendors.
Signed-off-by: Morten Priess <mtpr@oticon.com>
The ticker 'force' flag is propagated via the ticker elapsed callback,
in order to provide necessary information for collision resolving in the
link layer.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Added config BT_TICKER_SLOT_AGNOSTIC which configures the ticker in
a "slot agnostic" mode, in which no collision resolving or slot
reservation is possible or used. In this mode, the ticker acts as a
simple timer.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Renamed to BT_TICKER_LOW_LAT in ticker, and changed selected
conditionally compiled code to use IS_DEFINED macro.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Change the GPIO_MMIO32_INIT to take a devicetree node since we want
to use DEVICE_DT_DEFINE. This makes it so that code using
GPIO_DT_SPEC_GET works correctly with GPIO controllers that utilize
GPIO MMIO32.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added net-capture.py script to net-tools project. The script
can be used to view and save the captured network traffic to
pcap file.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The typical number of needed translation tables depends on memory
domain usage and userspace support, but also on the virtual address
space width due to the number of translation levels involved.
Reflect that in the default value.
Also fix a related comment where values were off by 1.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This very first version supports the 160x128 pixels adafruit TFT display
Signed-off-by: Kim Bøndergaard <kim@fam-boendergaard.dk>
Signed-off-by: Kim Bøndergaard <kibo@prevas.dk>
First version of a driver for the st773r LCD controller.
Based on st7789v
Signed-off-by: Kim Bøndergaard <kim@fam-boendergaard.dk>
Signed-off-by: Kim Bøndergaard <kibo@prevas.dk>
I2C isn't connected on the KW40Z to anything so configuring the pins
for at and having it enabled in the devicetree don't make any sense.
Additionally, the pins for I2C are currently conflicting with the UART
pins, which is another reason to remove the I2C config.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we are building the driver with CONFIG_UART_INTERRUPT_DRIVEN=n
we need to ifdef around the decleration of uart_cmsdk_apb_isr()
or we'll get a compiler warning.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The board _defconfig file was trying to set
LOG_MODE_IMMEDIATE unconditionally by default, which
caused a warning when LOG wasn't enabled.
Instead set it only when LOG is enabled.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Modify the testcase design to solve some threads
can't lock mutex. Using array index to detect the order
of threads getting mutex instead of delaying.
Fixed#34116
Signed-off-by: Ningx Zhao <ningx.zhao@intel.com>
The structure for the arm64_cpu_init array has to carry the cache
alignment on the whole structure and not on some internal padding
to achieve the desired effect.
And align struct __esf to a 16-byte boundary which will also align
its size accordingly. This structure is allocated on the stack on
exception entry and the ABI prescribed 16-byte stack alignment
should be preserved.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Replace k_work_cancel_delayable() with k_work_cancel_delayable_sync()
to make sure that the submitted work becomes idle before accessing
sensitive data.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This commit implements the secondary service
Audio Input Control Service (AICS) server and client.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
``arduino-header-r3`` was incorrectly referred to as
``arduino-r3-header``.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
STM32Cube updates:
stm32cube: update stm32l5 to version V1.4.0
stm32cube: update stm32l4 to version V1.17.0
stm32cube: update stm32g4 to version V1.4.0
stm32cube: update stm32f7 to version V1.16.1
stm32cube: update stm32f4 to version V1.26.0
stm32cube: update stm32g0 to version V1.4.1
stm32cube: update stm32h7 to version V1.9.1
stm32cube: update stm32mp1 to version V1.4.0
update stm32cube/common_ll
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds feature allowing to use yaml file with dictionaries defining
tests to be quarantined (extra arg "--quarantine-list FILENAME").
The dictionaries are validated according to the proper schema
and loaded.
A flat list is created containing quarantined configurations
(configuration = platform + scenario). Configurations under quarantine
are skipped and get "Quarantine" as a reason in the results reports.
A "comment" can be added to a quarantine entry in the quarantine yaml
with more details (e.g. issue #) and it will be also added to
the report.
The status of tests under quarantine can be verify if
`--quarantine-verify` is used in addition to
"--quarantine-list FILENAME". Using these args will make twister skip
all tests which are not on the quarantine list.
Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
Flag was present only when ZLI was enabled. That resulted in additional
ifdefs needed whenever code supports ZLI and non-ZLI mode.
Removed ifdefs, added build assert to irq connections to fail at
compile time if IRQ_ZERO_LATENCY is set but ZLI is disabled. Additional
clean up made which resulted from removing the ifdef.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Enabling flash support for nucleo-l152re in device tree.
This has been tested with flash sample application on
nucleo-l152re platform.
Documentation has been updated.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Enabling flash support for nucleo-g071rb in device tree.
This has been tested with flash sample application on
nucleo-g071rb platform.
Documentation has been updated.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Enabling flash support for nucleo-f103rb in device tree.
This has been tested with flash sample application on
nucleo-f103rb platform.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
