arm64: improve CONFIG_MAX_XLAT_TABLES default value
The typical number of needed translation tables depends on memory domain usage and userspace support, but also on the virtual address space width due to the number of translation levels involved. Reflect that in the default value. Also fix a related comment where values were off by 1. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
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2 changed files with 20 additions and 18 deletions
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@ -134,20 +134,6 @@ if ARM_MMU
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config MMU_PAGE_SIZE
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default 0x1000
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config MAX_XLAT_TABLES
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int "Maximum numbers of translation tables"
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default 16 if USERSPACE
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default 8
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help
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This option specifies the maximum numbers of translation tables.
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Based on this, translation tables are allocated at compile time and
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used at runtime as needed. If the runtime need exceeds preallocated
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numbers of translation tables, it will result in assert. Number of
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translation tables required is decided based on how many discrete
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memory regions (both normal and device memory) are present on given
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platform and how much granularity is required while assigning
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attributes to these memory regions.
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choice
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prompt "Virtual address space size"
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default ARM64_VA_BITS_32
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@ -211,6 +197,22 @@ config ARM64_PA_BITS
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default 42 if ARM64_PA_BITS_42
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default 48 if ARM64_PA_BITS_48
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config MAX_XLAT_TABLES
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int "Maximum numbers of translation tables"
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default 20 if USERSPACE && (ARM64_VA_BITS >= 40)
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default 16 if USERSPACE
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default 12 if (ARM64_VA_BITS >= 40)
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default 8
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help
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This option specifies the maximum numbers of translation tables.
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Based on this, translation tables are allocated at compile time and
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used at runtime as needed. If the runtime need exceeds preallocated
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numbers of translation tables, it will result in assert. Number of
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translation tables required is decided based on how many discrete
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memory regions (both normal and device memory) are present on given
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platform and how much granularity is required while assigning
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attributes to these memory regions.
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endif # ARM_MMU
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endif # CPU_CORTEX_A
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@ -61,10 +61,10 @@
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* Calculate the initial translation table level from CONFIG_ARM64_VA_BITS
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* For a 4 KB page size:
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*
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* (va_bits <= 20) - base level 3
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* (21 <= va_bits <= 29) - base level 2
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* (30 <= va_bits <= 38) - base level 1
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* (39 <= va_bits <= 47) - base level 0
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* (va_bits <= 21) - base level 3
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* (22 <= va_bits <= 30) - base level 2
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* (31 <= va_bits <= 39) - base level 1
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* (40 <= va_bits <= 48) - base level 0
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*/
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#define GET_BASE_XLAT_LEVEL(va_bits) \
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((va_bits > L0_XLAT_VA_SIZE_SHIFT) ? 0U \
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