QEMU MMU tracing showed that there might be something wrong with
its Xtensa MMU implementation, which result in access violation
when running samples/userspace/hello_world_user.
Here is the MMU trace from QEMU from failed runs:
get_pte: autorefill(00109020): PTE va = 20000424, pa = 0010c424
get_physical_addr_mmu: autorefill(00109020): 00109000 -> 00109006
xtensa_cpu_tlb_fill(00109020, 1, 0) -> 00109020, ret = 0
xtensa_cpu_tlb_fill(00109028, 1, 0) -> 00109028, ret = 0
xtensa_cpu_tlb_fill(00109014, 0, 2) -> 00103050, ret = 26
The place where it fails is during reading from 0x109014.
From the trace above, the auto-refill maps 0x109000 correctly
with ring 0 and RW access with WB cache (which should be correct
the first time under kernel mode). The page 0x109000 is the libc
partition which needs to be accessible from user thread.
However, when accessing that page, the returned physical address
became 0x103050 (and resulting in load/store access violation).
We always identity map memory pages so it should never return
a different physical address.
After forcing TLB invalidation during page table swaps, the MMU
trace is:
get_pte: autorefill(00109020): PTE va = 20000424, pa = 0010c424
get_physical_addr_mmu: autorefill(00109020): 00109000 -> 00109006
xtensa_cpu_tlb_fill(00109020, 1, 0) -> 00109020, ret = 0
get_pte: autorefill(00109028): PTE va = 21000424, pa = 0010e424
get_physical_addr_mmu: autorefill(00109028): 00109000 -> 00109022
xtensa_cpu_tlb_fill(00109028, 1, 0) -> 00109028, ret = 0
get_pte: autorefill(00109014): PTE va = 21000424, pa = 0010e424
get_physical_addr_mmu: autorefill(00109014): 00109000 -> 00109022
xtensa_cpu_tlb_fill(00109014, 0, 2) -> 00109014, ret = 0
xtensa_cpu_tlb_fill(00109020, 0, 0) -> 00109020, ret = 0
Here, when the same page is accessed, it got the correct PTE
entry, which is ring 2 with RW access mode (but no cache).
Actually accessing the variable via virtual address returns
the correct physical address: 0x109014.
So workaround that by forcing TLB invalidation during page swap.
Fixes#66029
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a kconfig to enable invalidating the TLBs related to
the incoming thread's memory domain during page table swaps.
It provides a workaround, if needed, to clear out stale TLB
entries used by the thread being swapped out. Those stale
entries may contain incorrect permissions and rings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Only reset cause is supported as there is no common unique id
present on those chips.
Unique ID can be put in OTP but there is no single specification for this.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
There is no need for this config here and it is messing
with total sys heap calculation.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The K_SPINLOCK is been indented wrongly by clang-format. It fixes that
adding the K_SPINLOCK to the FOR_EACH section rule tells the formatter
to follow the rule to indent the code.
Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
In some cases, users want to allocate (comparatively) massive
thread stacks.
Add a test to ensure we can allocate such a stack by default.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
A previous size optimization capped the pthread_attr_t stacksize
property at 65536. Some Zephyr users felt that was not large
enough for specific use cases.
Modify struct pthread_attr to support large stack sizes by
default with the flexibility to allow users to vary the number
of bits used for both stacksizes and guardsizes.
The default guardsize remains zero sinze Zephyr's stack
allocators already pad stacks with a guard area based on other
config parameters, and since Zephyr is already designed to
support both SW and HW stack protection at the kernel layer.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Add SOC definition for MK22F12 series, larger LQFP-144 K22 series
parts that feature additional peripheral instances.
Additionally, these parts differ from the standard MK22 in the following
ways:
- SYSMPU peripheral is present, so an MPU definition is required
- No external oscillator divider is present
This commit also updates the NXP HAL to include pin control files for
these SOCs.
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
Use K_KERNEL_STACK_SIZEOF instead of the config directly to set the
stack size in k_thread_create() calls.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Verify we have the coverage tool we want to use, otherwise we will end
up with many warnings and errors during coverage data collection.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add function to get a MICP microphone controller
instance from a connection pointer. This is effectively
the reverse of bt_micp_mic_ctlr_conn_get, and works similar to
bt_vcp_vol_ctlr_get_by_conn.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
This removes duplicated code by adding helper functions to allocate
and free bt_tbs_call objects.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
Simplify the function flow, by sending the signal strength notification
in one place, the reporting_interval_work handler.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
This adds the pins for the board's USB Micro-B connector to the device
tree as zephyr_udc0, allowing USB examples to run natively on the board
Signed-off-by: James Anderson <jrsa@jrsa.co>
Additional checks for Twister command line options `--coverage-tool`
and `--coverage-formats`.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Twister now uses GCOVR by default as the more reliable code
coverage reporting tool instead of LCOV.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Move various utilities out of lib into own folder for better assignement
and management in the maintainer file. lib/os has become another dumping
ground for everything and it the Kconfig and contents in that folder
became difficult to manage, configure and test.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Gone through orphaned files and added those to relevant areas and
created new areas. Initially, some of the areas have the minimal
required data, i.e. without maintainers or collaborators which can be
filled in later.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add two new keys: tags, tests.
tags for aligning with what we use in tests and samples and tests to
associate areas and components with tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Deprecate lwm2m_set_u64() and lwm2m_get_u64 as only
LWM2M_RES_TYPE_S64 exist. Unsigned variant is not defined.
Technically these might have worked OK, but it is undefined
what happens to large unsigned values when those are
converted to various payload formats (like CBOR) that might
decode numbers differently depending of their signedness.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Config the sram0 to be non-cachable to PASS the DMA testcases
chan_blen_transfer and loop_transfer
on the stm32f746zg and stm32f767zi nucleo boards.
The CONFIG_NOCACHE_MEMORY is useless as the memory region
gets the NOCACHE ATTRibutes for stm32H7 or stm32F7 as well.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Declare the SRAM0 region as memory-region
for the stm32f745 serie. Will be included for the stm32f746
for the stm32f765 serie. Will be included for the stm32f767
for the stm32f722 serie. Will be included for the stm32f723
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Supporting Stop1 mode while BLE RF is enabled requires some specific
adaptation and usage of STM32WBA Cube BLE controller scm API.
scm (Secure clock manager) is in charge of switching clock depending
on RF status and should be informed of PM stop modes scheduling.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Adding support for the Adafruit QT PY RP2040.
Signed-off-by: Kelly Helmut Lord <helmut@helmutlord.com>
Signed-off-by: Ian Wakely <raveious.irw@gmail.com>
Update LPSS DMA init interface which is common and
independent of parent-node.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
We should set the z_clock_hw_cycles_per_sec as the value of
the system clock frequency.
There was a mistake in referencing the clock source set before
initialization.
I corrected it to reflect the clock value after initialization.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
I/O or memory decoding should be disabled via the command register
before sizing BAR for calculation MMIO size
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Only copy up to IFNAMSIZ - 1 number of characters of the interface name to
leave room for null termination of string.
Fixes: #66777
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When reconfiguring a previously used endpoint, it may still be locked
when a write was taking place when e.g. the host application crashed.
The call to udc_rpi_cancel_endpoint seems to do a proper cleanup of
the endpoint, i.e. the write semaphore will be released.
Fixes#66723.
Signed-off-by: Manuel Aebischer <manuel.aebischer@netmodule.com>
