Benchmarks are not tests, we run them to verify they still work and do
not bitrot. Running them on each architecture should be sufficient.
This reduces amount of churn in CI and still allows them to be run
individually on platforms.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds the board name (displayed as a code literal) to the "Wikipedia
card" for quick reference.
Fixes#81652.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Don't duplicate the test's output running it on `native_sim` after
`LOG_BACKEND_NATIVE_POSIX` was enabled by default (bd9836be8c)
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Don't duplicate the test's output running it on `native_sim` after
`LOG_BACKEND_NATIVE_POSIX` was enabled by default (bd9836be8c)
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
This refactors internal bits out of the public API header file
and into its own file. This includes:
* Driver API struct which is only used by driver implementations
but not by users of API.
* Inline implementations of various APIs.
* Inline z_impl_*.
These are implementation details that do not need to live within
the public API header file. This de-clutters the public header
file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add `idle` and `s2ram` power states for nRF54H20 cpuapp and cpurad.
Also the substate `idle_cache_disable` added.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Due to the possibility of simultaneous accesess to LRCCONF registers,
additional management is required.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Currently, the serialization module for 802.15.4 enabled
the network core without giving it access to application
core memory in trusted execution mode. This commit
grands this access.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
Some code that automatically gets embedded on some platforms relies
on having `CONFIG_TIMEOUT_64BIT` enabled.
Do not force disabling that Kconfig option in the test configuration,
as that will make the test fail to compile on those platforms.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
CMAKE_LINKER_GENERATOR common-ram.cmake is out of date.
This updates it to keep it up to date with common-ram.ld
Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
Introduce etrbuffer in the tddconf bindings to support flexible
placement in the memory map.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Get eclair specific option file variable via zephyr_get.
This is also needed if the sca is invoked with sysbuild so it uses
the intended file.
Signed-off-by: Simon Hein <Shein@baumer.com>
DMA transfers do not execute when the USBD peripheral is in Low Power
mode. Make sure that there is no DMA active transfer when entering Low
Power mode and that new DMA transfers are not started when in Low Power
mode because the transfer won't ever finish.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Low Power mode can only be entered when there are no active DMA
transfers. Move the Suspend and Resume processing to thread to allow
waiting for the DMA available semaphore in USB Suspend handler.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This commit adds a runner wrapper for the 'minichlink' program which
offers a free, open mechanism to use the CH-LinkE programming dongle for
the CH32V003.
https://github.com/cnlohr/ch32v003fun/tree/master/minichlink
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds support for the CH32V003EVT board which features a
32-bit general-purpose RISC-V MCU.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the pfic interrupt controller driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the usart driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the systick driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the clock driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the pinctrl driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This commit adds the dtsi and bindings for the WCH CH32V003 which is a
32-bit general-purpose RISC-V MCU.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
This addresses the following warning building with `CONFIG_64BIT=y`:
error: format '%hu' expects argument of type 'int', but argument X has
type 'size_t' {aka 'long unsigned int'}
Signed-off-by: Chen Xingyu <hi@xingrz.me>
bt_le_set_auto_conn() function is not working as
expected. Also, it doesn't have any test coverage
and any usage in sample applications.
The function is deprecated
Fixes#81597
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
The ram0x partitions seem to be not compliant with nRF54H20
architecture and it causes that in the application dts overlay file
it is difficult to extend cpuapp_ram0x_region without modifying
whole layout.
It is better to place cpurad_ram0x_region at the beginning at
2f010000 address and then cpuapp_ram0x_region right after that.
Thanks to that, if the application needs to have more than 256 kB
of RAM, in the application dts overlay file, a user can increase
cpuapp_ram0x_region size up to 2f0be000.
Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
Add missing "pinctrl-names" and "status" properties for
the spi1 node in ek_ra8m1.dts to able to test spi_loopback
on ek_ra8m1
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
TX part of interrupt driven API was not calling PM device runtime
API. Additionally, when txstopped occurred after poll out it was
not handled correctly.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
