Commit graph

4 commits

Author SHA1 Message Date
Anas Nashif
cff0005a87 x86: move soc/cpu to top-level under soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Daniel Leung
b3e68703b5 arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs
This adds PCI related configuration for UARTs and I2C controllers
to the Apollo Lake SoC configuration to support PCI devices.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-27 17:16:18 -04:00
Daniel Leung
88f4b68165 arch/x86: apollo_lake: add MMU regions for I2C controllers
The Apollo Lake SoC has 8 I2C controllers. The MMU regions are
added to allow access.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-27 17:16:18 -04:00
Daniel Leung
26e83aab35 arch/x86/soc: add SoC configuration for Apollo Lake
This adds the SoC configuration for Apollo Lake. This is based
on the Atom configuration.

Origin: Original

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 16:27:52 -04:00