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arch/x86: apollo_lake: add MMU regions for I2C controllers

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The Apollo Lake SoC has 8 I2C controllers. The MMU regions are
added to allow access.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2018-07-23 16:00:13 -07:00 • committed by Anas Nashif
commit 88f4b68165
1 changed files with 45 additions and 0 deletions
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45
arch/x86/soc/apollo_lake/soc.c
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@ -45,4 +45,49 @@ MMU_BOOT_REGION(CONFIG_UART_NS16550_PORT_1_BASE_ADDR, 0x1000,
#endif /* CONFIG_UART_NS16550 */
/* for I2C controllers */
#ifdef CONFIG_I2C
#ifdef CONFIG_I2C_0
MMU_BOOT_REGION(CONFIG_I2C_0_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_1
MMU_BOOT_REGION(CONFIG_I2C_1_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_2
MMU_BOOT_REGION(CONFIG_I2C_2_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_3
MMU_BOOT_REGION(CONFIG_I2C_3_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_4
MMU_BOOT_REGION(CONFIG_I2C_4_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_5
MMU_BOOT_REGION(CONFIG_I2C_5_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_6
MMU_BOOT_REGION(CONFIG_I2C_6_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_7
MMU_BOOT_REGION(CONFIG_I2C_7_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#endif /* CONFIG_I2C */
#endif /* CONFIG_X86_MMU */