Improve the Kconfig descriptions for the atmel,at2x EEPROM driver. This
driver works for a number of different EEPROM families manufactured by
vendors other than Atmel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the
management of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
- ace30 (PTL) support.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
In the Intel platforms most of HPSRAM is used by modules when
are required. By default all these banks are powered off and are
enabled by L2 MM driver only when needed.
At the driver initialisation each unused page is unmaped and
when whole HPSRAM bank is unused the power is switched off.
Since mapping memory in MMU TLB and flushing it at system start is
not needed and time consuming, this patch modifies the init
sequence to avoid it.
Additionally it adds MMU maping and unmaping for pages allocated
from unused pool.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
headers for dmic are now part of the SoC and maintained per generation,
so create one header for PTL and build the code for PTL in some of the
drivers (dmic_nhlt).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Before sending packet to controller the host needs to poll the status of
controller to know it's ready, or before reading packets from controller
the host needs to get the payload size of coming packets by sending
specific command and putting the status or size to the rx buffer, the CS
should be held at this moment to continue to send or receive packets.
This change is needed for the based SPI driver update.
Signed-off-by: Aaron Ye <aye@ambiq.com>
This commit adds support for the SPI which
can be found in Apollo3 SoCs, it can work in
both DMA and non-DMA modes
Signed-off-by: Hao Luo <hluo@ambiq.com>
Fix a compilation error occurring when a prescaler was set for ADC on F1
and F3 family.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a semaphore to protect the disable access to the RNG peripheral
when the PM is going to suspend mode.
The change does not affect other stm32 than CONFIG_SOC_SERIES_STM32WBX
or CONFIG_STM32H7_DUAL_CORE
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The commit selects HAS_NO_EXPLICIT_ERASE for Apollo4,
with MRAM, and HAS_EXPLICIT_ERASE for Apollo3 which has Flash,
for a driver that shares code between SoCs.
In case of Apollo4 the no_explicit_erase capability is set to
true, while it remains false for Apollo3.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Add explicit_erase capability and set proper value to it,
depending on type of a device.
Select FLASH_HAS_EXPLICIT_ERASE by devices that have program-erase
characteristics and FLASH_HAS_NO_EXPLICIT_ERASE, where needed.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit adds support for testing non-explicite-erase
device on Flash Simulator. This is addition to already supported
explicit erase before write, aka Flash, type of device behaviour.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit adds two new API calls:
- flash_fill - that allows to fill selected part of device with
specified value;
- flash_flatten - that allows to erase or fill device with
erase_value, depending on whether driver for the device provides
erase callback.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit adds and no_explicit_erase capability to flash_parameters,
that indicates whether device is program-erase type device; such
devices, like Flash type devices, require erase prior to writing
random data at any previously programmed location.
This capability should only be set by drivers.
The flash_params_get_erase_cap() function has been added, for parsing
flash_parameters object to obtain erase capabilities of device.
The function returns capabilities as combination of bits representing
them. Currently it will return:
0 -- no erase capabilities
FLASH_ERASE_C_EXPLICIT -- erase required before write of random data.
Additional capabilities have been reserved but are not yet used.
There are following Kconfig options added:
FLASH_HAS_EXPLICIT_ERASE
FLASH_HAS_NO_EXPLICIT_ERASE
that should be selected by device driver to indicate whether
devices served by driver needs erase prior to write.
The above Kconfigs are used to figure out whether app is built
for hardware that requires erase prior to write.
They can be also used to detect that it is attempted to build
some subsystem that will not work with provided hardware, for example
file system that has not been prepared to work with devices that
do not require erase.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Add support for the IS31FL3194 3-channel LED driver. This driver can be
configured to handle its outputs as either a single RGB LED or (up to)
three independent LEDs.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
This commit should deal with the followings:
1. PLL requires that VDD level be changed to 1V2 and then released
to 0V9 when it's turned off. Changing the VDD level should be
done when the regulator driver is available. Otherwise, the VDD
level will be fixed to 1V2 (reset value).
2. Check if PLL is allowed to be turned off as it might happen that
USB is enabled which is clocked by PLL.
3. Do not wait for the PLL to lock. This is now performed silently
when PLL is requested.
4. Before switching to PLL we should check if PLL is already enabled
as it might happen that PLL node is initially disabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
This commit should deal with the followings:
1. Change regulator's driver priority as it should now
be used by the clock control driver.
2. Check if the VDD level is permitted to change when PLL
is the system clock. This is because the PLL requires
that VDD be 1.2V.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
This commit should add all the functionality needed for the counter
driver to work when PM is enabled. The sleep state is bound to the
counter start/stop functionality. TIMER3/4 block instances are
powered by PD_SYS and so sleep should be constrained when they are
up and running. On the other hand TIMER1/2 block instances are
powered by PD_TMR which is always on (used to generate the os tick).
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
In some cases CAN-Bus communication may be
disturbed by other parts of SoC. For example USB
may disturb CAN communication if electircal wiring
of the board is not done properly or the system is
in development stage.
This change adds debug-prints s.t. CAN-Bus protocol
errors in arbitration or data phases can be
detected while in CAN-Bus ISR.
Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
This patch adds a timeout to the clock_control_on() implementation. The
reason for this timeout is to prevent system freezes when the PLL is
configured incorrectly, or, if BICR is wrong. The locking time of the
AUXPLL is <30us, however, when it starts it also starts other
dependencies which take much longer to become ready. The locking time
has been experimentally measured to be around 2ms, so a 10x bound has
been added.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The RTC shell get command displays the time according to the ISO8601
standard. Fix the milliseconds field to be displayed on 3 digits instead
of 6 like if they were microseconds. In addition change the separator
between seconds and milliseconds to a dot like specified in the ISO8601
standard.
Before:
2024-06-02T22:33:10:000667
After:
2024-06-02T22:33:10.667
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
can_mcan_send/can_mcan_get_message issued a message ram write/read even
when data length was 0. This caused some issues on systems where data
cache is enabled, because the cache invd/flushing calls present in the
mcan driver can fail if provided length is 0.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Decoder api was not defined and lead to build error
if it is used in userland.
Fix that by adding necessary DT_DRV_COMPAT #define
in akm09918c sensor decoder.
Signed-off-by: Florian Weber <florian.weber@live.de>
These devices have a somewhat odd hybrid design, with a free-running
64 bit up counter but no comparator. Instead interrupts are triggered
by (one of an array of) 32 bit down counters with reset (a-la SysTick,
but without the 24 bit precision issues). The combination actually
results in a fairly simple driver as we can skip the comparator
rounding math.
Signed-off-by: Andy Ross <andyross@google.com>
Add an interrupt controller driver for this device. This is an
extremely simple second level controller with per-interrupt-bit
registers for "enable" and "status". There is no internal latching,
so no "clear/ACK" process is needed.
Signed-off-by: Andy Ross <andyross@google.com>
When RxOnWhenIdle is set to False, turn the radio off
if no operation is ongoing in order to save power.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Optionally bypass the shell when printing received CAN frames in order not
to break up the line containing the frame. This allows for parsing the
printed CAN frames using Twisters pytest and console harnesses with the
cost of the shell ignoring input while the frame is being printed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
In an effort to shave off code size, remove out-of-the-box
enabling of crypto features (except SHA-256).
Configurations are adjusted to enable what they need.
Bonuses:
- When enabled, AES now defaults to using a smaller version
(`CONFIG_MBEDTLS_AES_ROM_TABLES` isn't default enabled anymore,
and if enabled, `CONFIG_MBEDTLS_AES_FEWER_TABLES` defaults to y).
- Conditions around Mbed TLS Kconfig options have been improved
to reflect the reality of the dependencies.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
This change is aborting the memoryMapped mode of the octo-flash
before erasing or writing the NOR. Operations are performed in
command mode.
Reading is always performed in MemoryMapped mode (memcopy)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable the MemoryMapped Mode for the stm32 octoFlash driver
Configure the Flash in MemoryMapped to use in XiP mode.
With this mode the erase and write are not supported.
Address and size are given by the DTS register property.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This WDT is responsible for monitoring the external
32.728 Hz crystal connected to pins XTAL_32K_P and
XTAL_32K_N. If an oscillation failure is detected
the hardware automatically switch to RTC_RC_SLOW
clock source and triggers an interrupt.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit should fix the followings:
1. Suppress compiler warnings
2. Cryptographic mode should first be exercised before
applying the secure key
3. In-memory word swap operations should be omitted as
the key should reside in the flash memory and so any
write access should raise a busfault exception
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The controller should be considered
inactive when TX/RX FIFOs are empty
and there is no data in SPI_RX_TX_REG.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
STM32 MCU shall set voltage regulator level with respect to set clock
frequency to reach optimal power consumption.
Voltage regulator is set prior to clock setting based on configuration
from dts/overlay file. Config_regulator_voltage is set as weak in
clock_stm32_ll_common - config_regulator_voltage can be
extended to other STM32 families without need to rewrite heavily
family clock driver, default one can be still used.
Signed-off-by: Lubos Koudelka <lubos.koudelka@st.com>
Add build-time assert to check if the size defined is actually addressable.
i.e: if address-width is set to 8, the maximum addressable size is 256
bytes.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
Add a parameter to allow the configuration of the number of address
bytes used by the I2C master. This allows the driver to expose larger
buffer sizes.
Tested with standard linux at24 driver.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
