Commit graph

5 commits

Author SHA1 Message Date
Anas Nashif
cea0b3a9c2 xtensa: move soc to top-level dir soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Sebastian Bøe
347f9a0a2d cmake: LD: Specify the entry point in the linker scripts
The entry point can and therefore should be set by linker
scripts. Whenever possible one should express things in the source
language, be it .c or .ld, and not in code generators or in the build
system.

This patch removes the flag -eCONFIG_KERNEL_ENTRY from the linker's
command line and replaces it with the linker script command

ENTRY(CONFIG_KERNEL_ENTRY)

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-07-03 17:18:14 -04:00
Savinay Dharmappa
97f721d928 dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Rajavardhan Gundi
02736e5935 intel_s1000: add intel_s1000_crb board
intel_s1000_crb board makes use of the intel_s1000 SoC. It has
a built-in ROM which gets executed upon applying power. It then
executes the secondary bootloader followed by the FW (like zephyr).

Change-Id: If334c359b4372a56997c3b2e1eb9250e80847f07
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-01 16:46:41 -04:00
Rajavardhan Gundi
f14d1be67f intel_s1000: Add intel_s1000 SoC
intel_s1000 is an SoC having cavs21_LX6HiFi3_RF3_WB16 as the CPU which
belongs to Xtensa family. This is being used in intel_s1000_crb.

Change-Id: Ic424aa77557bf31024ddbf3f1d76b72a4adb8f66
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-01 16:46:41 -04:00