Added file with common properties for cortex-m cores.
Added optional swo-ref-frequency property.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add GPIO definitions to QuickLogic EOS S3 devicetree.
Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
In some stm32 series systick was disabled in order to
allow alternate use of lptim timer as kernel low power ticker.
Doing this, dts based definition of CORTEX_M_SYSTICK Kconfig symbol
is disabled and CORTEX_M_SYSTICK was redefined with 'default y'
in stm32 soc files which makes things more complex to handle to
alternate with LPTIM activation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To keep the generic DMA device name as defined
in the dma framework config, renamed paxdma device
label to "DMA_1".
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Use kinetis SIM clock divider options set in device tree
instead of hardcoded values.
The kl25z device tree did not previously define a MCG node.
This has now been added with the general "nxp,kinetis-mcg"
binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
The kv5x device tree originally used the undefined
"nxp,kv58-mcg" binding for the MCG node. This has been
replaced by the general "nxp,kinetis-mcg" binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
Both the kw40z and kw41z device tree originally used an
undefined "nxp,kw41z-mcg" binding for the MCG node.
This has been replaced with the general "nxp,kinetis-mcg"
binding instead.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
add CAN_1 and CAN_2 hw modules support
Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
Co-authored-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update register addresses and NVIC/GIC interrupt numbers
according to the latest viper RTL version.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.
When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.
There are two kinds of problems with this choice:
1. PSCI is only defined for the non-secure world and it is designed to
boot CPU cores into non-secure state (that means that PSCI is only
supposed to work if Zephyr is running in non-secure state)
2. There can be other ways or standards used to start / stop a core
different from PSCI
This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.
For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The DMA bindings had duplicate description: keys. Merge the two
descriptions into one to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Many data items that are represented in a pin configuration node are
common and generic. Pin control bindings should use the properties
defined on a standard way when are applicable; not all of these
properties are relevant or useful for all hardware or binding
structures. Each individual binding document should state which of
these generic properties, if any, are used, and the structure of the
DT nodes that contain these properties.
This is based on Linux, documentation:
https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add device tree nodes for the Digital-to-Analog (DAC) modules present
in the NXP Kinetis K2x series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deprecate the scl-pin and sda-pin properties in the devicetree.
Provide new scl-gpios and sda-gpios properties instead.
This lets the user specify SCL and SDA like this:
&i2c0 {
scl-gpios = <&gpio0 1 0>;
sda-gpios = <&gpio1 4 0>;
};
Instead of having to use:
&i2c0 {
scl-pin = <1>;
sda-pin = <36>;
};
Provide error checking and understandable error messages for invalid
configurations.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Convert ism330dhcx INT_PIN attribute from Kconfigs to Device
Tree binding properties. Here int-pin has been defined as
enum with two possible values: 1 and 2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Convert ism330dhcx accel and gyro odr attributes from Kconfigs to Device
Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Converts ism330dhcx accel and gyro range attributes from Kconfigs to
Device Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Create a common properties file that will be included by all bindings
(as i2c and spi) handled by ism330dhcx driver.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The wifi controller isn't accessed via MMIO and thus shouldn't
exist under the SoC node which is for MMIO based devices so move
it up a level.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change dfe-ant-num propert name to dfe-antenna-num.
The change is conde to keep the same naming style
for all properies, like dfe-pdu-antenna property.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Add initialization of GPIOs that are used for antenna switching.
GPIOs provided to DFE extension in Radio peripheral, to drive
antenna switching, should be initialized in GPIO peripheral beforehand.
The initialization is optional and may be disabled by Kconfig.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Add quadspi node in stm32f7.dtsi and quadspi support to boards
stm32f746g_disco and stm32f769i_disco.
Note! Does not support DMA.
Signed-off-by: Helge Juul <helge@fastmail.com>
NPCX chip allows firmware to select the JTAG0/1 via bit 2/1 in the
DEVALT5 register. However, the selection logic is reverse
(i.e. 0:select; 1:not select.)
This change fixes the wrong setting of the invert field.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I2c080feaa7647e940463d9491b61a342c84a6141
The size of System Configuration register cannot exceed 0x70. Otherwise,
it will overlap the Debug Interface register which starts from
0x400c3074.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
