Instead of hard-coded values for interrupt priorities in DT nodes, use
a macro that additionally can be overridden at the board or application
level. This allows, for instance, changing the interrupt priorities for
all but one peripheral without using a lengthy overlay file.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This file originally added a "nordic,nrf-sw-pwm" node with a few basic
properties that were common to all nRF51 and nRF52 series SoCs. There
is no implementation of SW_PWM available for other nRF series. At the
time this file has been created, there was only nRF91 apart from nRF5x,
but when nRF53 appeared, the name of this file became misleading.
Recent addition of common disabling of the systick node made it clear
that such common file for all nRF SoCs is convenient.
To prevent further confusion, rename this file to nrf_common.dtsi and
keep there only stuff actually common to all nRF series, moving the
SW_PWM related node to particular SoCs that use it (this is actually
consistent with how all other nodes, that also have some properties
common to several or even all nRF SoCs, are defined).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Change io status of host-uart device to "disabled". It was caused by a
mistake during solving conflicts.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add a new display-inversion property to ili9xxx based display drivers to
send a "Display Inversion ON (0x21)" command during initialization.
This seems to be required for some ILI9xxx based displays to work
correctly, such as BuyDisplay ER-TFT028A2-4 (ILI9341 basd IPS display).
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Define a binding for zephyr,fstab which contains multiple child nodes
each of which identifies a file system type and configuration
parameters and associates it with a fixed partition. The base entry
properties specify the mount point and other generic fs mount options,
while bindings specific to a file system type provide the
configuration parameters necessary to describe the file system.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This change adds support for configurable interrupt capabilities
in the emulated GPIO controller via Devicetree bindings.
Fixes#26477
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The System Glue module includes the three major functions:
— Power Switch Logic (PSL)
— SMBus multi-bus, wake-up support
— Simple Debug Port (SDP)
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller). Since a single SMB module is able to serve only one
SMBus/I2C bus at a time, SMB_SEL registerin Glue module is used to
control theconnection of I2Cn_0 and I2Cn_1 interface pins to the SMBn
module (where n is 5, 6).
This CL provides a soc specific pin-control function called
"soc_pinctrl_i2c_port_sel" to switch buses (port) of the same SMB module
(controller). It will be used in the following i2c driver.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This commit adds the dtsi config for the stm32f303k8.
In addition fixing to long line for author.
Fixing sram0 memory size.
Signed-off-by: Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
Use PPIs 0-5 consistently across nRF51x and nRF52x for SW
PWM driver. Bluetooth LE controller's use of PPI has been
adjusted to use PPI 6-19 based on features enabled.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Convert drivers to use pinmux devicetree node to create pinmux device
object.
On intel S1000 we add 'label' as a required property and set it to
'PINMUX' to match CONFIG_PINMUX_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Currently, the only user of the Designware DMA controller
only needs the channel property. So make dma-cells to be
constant of 1.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add 'label' as a required property for nxp,kinetis-pinmux devices. In
addition we cleanup the kw2xd node labels for the pinmux devices to
match the SoC docs and use 'port' instead of 'pinmux_'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Apart from the previously added pins, nRF21540's GPIO interface includes
also MODE pin. This commit adds it to the relevant binding.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
The nRF21540 radio front-end-module can optionally be controlled by a
SPI interface. Add a binding and property to link the SPI bus
configuration data to the FEM node.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This device is not an ARM MCU, it's a radio front-end module. Based
on existing Linux practice it belongs in net/wireless.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The previous API can't change the sampling-point and only allowed
bitrates that fit the time segments.
The new API allows for shifting the sampling-point and adjusts the
number of time quantum in a bit to all more possible bitrates.
The functions to calculate the timings are moved to the can_common file.
They can be used for all drivers.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
This commit is about it8xxx2 platform device tree.
Add driver's binding files, and one device tree as sample.
Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
So far nRF's TIMER was used for generating PWM signal. Add support for
generating PWM based on RTC, which is sourced by 32KHz low frequency
crystal. This allows to use low frequency PWM with much lower power
consumption, because high frequency clock path can be disabled.
Don't support RTC clock prescaler, because maximum 512s period covers
most use cases. This allows to adjust pulse and period cycles to the
fact that CLEAR task event is generated always one LFCLK cycle after
period COMPARE value is reached.
Also update hal_nordic revision, as it contains updated check for PPI
channels conflict when RTC is used to generate PWM.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far 'timer-instance' DT property was the way to configure TIMER which
was used for generating PWM signal. Replace that by using 'generator'
phandle, so we get prepared for supporting RTC instances as PWM signal
generator.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Flash controller support is not yet ready on M4 core.
Remove the chosen declaration to make it clear.
Additionally, generate a build error if this driver is compiled
on M4 core.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Define erase and write block size for M4 side flash controller.
Additionally move compatible definition from package to soc file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Define write and erase block size for supported stm32h7 devices
Use a specific compatible string for stm32h7 devices for the flash
driver
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
Test macro DT_PROP_BY_PHANDLE_IDX_OR. There are two tests, one when
the property exists and other when the property is not set.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add power state property binding and include this property in cpu.
The pm-state attribute is a enum that matches with enum pm_state right
now the only timing attribute is the minimum residency that is the
minimum time for a power state be worthwhile.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
In order to prevent user turns on the pin-mux of devices has io-pads
unexpectedly, this CL added a new device definition for host uart
device. The pin-mux of host uart interface is enabled only if we set its
status as "okay" in dts file of board folder.
The following npcx7 drivers will meet:
1. Default status property of npcx devices with io-pads such as espi,
pwm, uart, host uart and so on should be "disabled".
2. Switch pin-mux by changing status property to "okay" in dts file of
board folder.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
It is put into interrupt controller since it expands some capabilities
of existing interrupt controllers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Define write and erase block size for supported stm32h7 devices
Use a specific compatible string for stm32h7 devices for the flash
driver
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.
The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
