Commit graph

118 commits

Author SHA1 Message Date
Tom Hughes
74f6f7f94c tests: kernel: interrupt: Remove MS_TO_US
No files use MS_TO_US except tests/kernel/interrupt/src/nested_irq.c.
While the macro is convenient, we should put it in a more central
location and use it everywhere if we want to use it rather than just in
interrupt_util.h. For now, remove it and replace the two usages to match
how code is written in the rest of Zephyr.

Signed-off-by: Tom Hughes <tomhughes@chromium.org>
2025-02-20 06:05:37 +01:00
Yong Cong Sin
b2b2963e6a irq: multilevel: compile 3rd level IRQ APIs only when enabled
This revert the idea of 3fa7d78 from #78845.

The 3rd level IRQ APIs won't compile when
CONFIG_3RD_LEVEL_INTERRUPT_BITS=0.

Updated testcases accordingly.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-02-19 14:49:27 +00:00
Jonathon Penix
dad2d65cfa sw_isr_table: Force align _isr_list_sname instances
For some target and optimization level combinations (aarch64 and -O2, for
example), GCC will over align _isr_list_sname instances. The local isr
declaration parser doesn't expect the extra padding that may be introduced
and will produce unexpected errors about bad IRQs (`error: IRQ 1903323438
(offset=0) exceeds the maximum of 42`, for example). Prevent this issue by
forcing the expected alignment of _isr_list_sname.

Fixes #81254

Signed-off-by: Jonathon Penix <jpenix@quicinc.com>
2025-02-11 00:43:55 +01:00
Carles Cufi
e78832034f soc: nordic: Introduce the nRF54L05 and nRF54L10
These two new ICs are variants of the nRF54L15 with different memory
sizes:

- nRF54L05: 500KB RRAM, 96KB RAM
- nRF54L10: 1022KB RRAM, 192KB RAM
- nRF54L15: 1524KB RRAM, 256KB RAM

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2024-11-21 09:26:38 +01:00
Anas Nashif
3364a35f05 Revert "irq: multilevel: compile 3rd level IRQ APIs only when enabled"
This reverts commit 2152b8e414.

This commit is breaking CI.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 22:40:13 -05:00
Yong Cong Sin
2152b8e414 irq: multilevel: compile 3rd level IRQ APIs only when enabled
This revert the idea of 3fa7d78 from #78845.

The 3rd level IRQ APIs won't compile when
CONFIG_3RD_LEVEL_INTERRUPT_BITS=0.

Updated testcase accordingly.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-11-19 20:04:32 -05:00
Carles Cufi
51c1e45301 soc: nordic: Remove the nRF54L15 EngA
The production version of the nRF54L15 SoC is now available, so remove
the initial Engineering A (EngA) preview version.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2024-10-21 01:46:39 +01:00
Krzysztof Chruściński
ffe6910e21 tests: kernel: interrupt: nested_irq: support nrf54h20_cpuppr
Add dedicated interrupt lines for nrf54h20_cpuppr. Similar exception
was already added to nrf54l15_flpr: 8742e2476.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-10-04 10:45:57 +01:00
Yong Cong Sin
8bfdff3cb1 irq: multilevel: add API to increment a multilevel IRQ
Unlike a normal IRQ, a multilevel IRQ can't be incremented by
simply `irq++`, as that would always increment the L1 of a IRQ,
regardless of its level. A function that understands the level
for which the IRQ operates in is required.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-02 10:08:19 +02:00
Yong Cong Sin
091d70de6b tests: kernel: interrupt: multilevel: test APIs with devicetree
Test multilevel-irq APIs with interrupt number generated from
the devicetree to make sure that they work in sync.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-02 10:08:19 +02:00
Karol Lasończyk
18086567dd tests: kernel: Add support for FLPR core in nRF54L15
Add support for production device.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
2024-08-29 12:02:35 +02:00
Marcin Szymczyk
68c48cd116 tests: kernel: interrupt: account for table offset
When verifying sw_isr_table, take into account custom offset,
like `CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET` in some
RISC-V SoCs.

Relates to #71948 and #73232.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-05-29 11:58:44 +02:00
Marcin Szymczyk
8742e24760 tests: kernel: interrupt: nested_irq: support nRF54L15 FLPR CLIC
Add support for VPR CLIC to `nested_irq` kernel test.
Verified on nRF54L15 FLPR for now.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-05-06 19:06:19 +02:00
Marcin Szymczyk
fd79676c16 tests: kernel: interrupt: account for custom RISCV IRQ offset
`CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET` offsets IRQ in
vector table, align test to this functionality.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-05-06 19:06:19 +02:00
Reto Schneider
397b8465dc tests: kernel: interrupt: lto: Exclude builds with warning
Trying to enable LTO when CODE_DATA_RELOCATION is already enabled
produces a warning.

This commit prevents twister from building such combinations for
arch.shared_interrupt.lto.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2024-03-22 17:42:35 -04:00
Patryk Kuniecki
52fd66bdfa tests: kernel/interrupt skip on ITE
After discussion in #63114 we should skip this test on ITE board.

Signed-off-by: Patryk Kuniecki <patryk.kuniecki@intel.com>
2024-02-07 22:08:22 +00:00
Radoslaw Koppel
53becb05bf tests: kernel: common: Enable tests with LTO
This commit enables some kernel tests with
Link Time Optimization enabled.

Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
2024-02-02 19:49:36 +01:00
Radoslaw Koppel
b0c83f328c arch: sw_isr_table: Update shared interrupts structures
This commit updates the definition of z_shared_isr_table_entry
to use _isr_table_entry instead of specially created z_shared_isr_client.

Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
2024-02-02 19:49:36 +01:00
Yong Cong Sin
2e37da45e5 tests: interrupt: sw_isr_table: fix index test for n+1 instance
The index test did not account for the level 2 table offset
when testing the (n + 1) instance, fix that.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-12-08 08:40:41 -05:00
Yong Cong Sin
7934a47332 tests: interrupt: sw_isr_table: use devicetree/Kconfig as ground truth
Updated the tests to use info from the devicetree or Kconfig as
ground truth and compare that with the output from the
functions under test.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-12-08 08:40:41 -05:00
Yong Cong Sin
f3da086ac3 arch: common: sw_isr: make sure that the table index is within range
Assert that the `local_irq` of each levels should only ranges
from `0` to `CONFIG_MAX_IRQ_PER_AGGREGATOR`, so that it doesn't
overflow the other aggregators.

Also, assert that the output of `z_get_sw_isr_table_idx` shouldn't
overflow the ISR table.

Update the `sw_isr_table` tests to test the range of
`CONFIG_MAX_IRQ_PER_AGGREGATOR` instead of the entire range of
level bits.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-12-08 08:40:41 -05:00
Yong Cong Sin
a28da922db tests: interrupt: refactor the sw_isr_irq_parent_table tests
Split the `sw_isr_irq_parent_table` test into one that tests
the IRQ table index function which is generic and should
always be tested, and one that tests multi-instance -related
functions which only work in interrupt controller drivers that
has multi-instance implementation.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-12-08 08:40:41 -05:00
Greter Raffael
8ed4876bed tests: kernel: also move the test_isr_dynamic to new ztest API
`test_isr_dynamic` for `CONFIG_GEN_SW_ISR_TABLE=n` was somehow
overlooked in commit b7f1e98724.

I'm disabling the irq at the end of the test. The babblesim for the
`nrf5340bsim_*` target walked into a timeout otherwise.

Signed-off-by: Greter Raffael <rgreter@baumer.com>
2023-11-15 10:01:22 +01:00
Yong Cong Sin
ec93404a26 arch: common: irq: relocate internal functions into a private header
Relocate new and existing internal software-managed table
access functions from the public `sw_isr_table.h` into a
private header that should only be accessed internally.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-11-09 11:20:42 +01:00
Yong Cong Sin
ad788a335f tests: interrupt: add testcase for functions in the sw_isr_table
Validate the following functions in the sw_isr_table:
- z_get_sw_isr_table_idx
- z_get_sw_isr_device_from_irq
- z_get_sw_isr_irq_from_device

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-11-09 11:20:42 +01:00
Benedikt Schmidt
aa25e212d1 tests: fix thread function signatures
Fix thread function signatures to avoid stack corruption on thread exit.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-10-30 12:24:34 +01:00
Anas Nashif
345735d0a8 tests: remove CONFIG_ZTEST_NEW_API in all tests
Remove all usage of CONFIG_ZTEST_NEW_API from tests and sample as this
is now enabled by default.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-10-20 15:04:29 +02:00
Alberto Escolar Piedras
5dfc93b73c tests interrupt_offload: Set a proper interrupt for POSIX arch targets
The test assumed that interrupt line 5 was up for grabs, but it
is not in general. (For ex., on an nrf53_bsim this is the clock
interrupt, which cannot be hijacked).

Instead, for boards that define it, let's use the int line
used for offloading SW interrupts (which is defined for all posix
arch boards in tree)
And if this is not defined, let's skip the test.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-09-18 10:42:25 +01:00
Laurentiu Mihalcea
127696383f tests: kernel: interrupt: Add testcase for shared interrupts
This commit introduces a new testcase for shared interrupts.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-09-14 08:35:12 +02:00
Keith Packard
844c78cf3a tests/kernel: Also run tests using minimallibc
With picolibc being the default C library, we need to explicitly include
testing against the minimal C library for kernel components.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-09-04 15:29:13 -04:00
Keith Packard
8a86733cfd tests/kernel/interrupt: Enable 'icount' for qemu_cortex_m0
This test fails when icount is disabled, so enable it

See 7bdc621ba9 which disabled icount by
default for this platform.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-08-23 10:09:44 +01:00
Anas Nashif
fa98745a10 tests: remove linker_generator sub tests from kernel
Kernel is being built the same way for all those tests and there is not
much related to the linker generator in any of those tests. Just keep a
small set of tests to have needed coverage in the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-06-02 04:47:06 -04:00
Gerard Marull-Paretas
93b63df762 samples, tests: convert string-based twister lists to YAML lists
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-10 09:52:37 +02:00
Kumar Gala
99fee43f07 tests: interrupt: Fix armclang compiler warning
When building this test with the armclang compiler we get the following
warning:

tests/kernel/interrupt/src/dynamic_isr.c
tests/kernel/interrupt/src/dynamic_isr.c:23:32: error: 'used' attribute
ignored on a non-definition declaration [-Werror,-Wignored-attributes]

extern struct _isr_table_entry __sw_isr_table _sw_isr_table[];
                               ^
There is no need to add the __sw_isr_table on the extern, so remove it
to address the warning.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-04-11 09:35:42 +02:00
Kumar Gala
1c8f1cd590 tests: kernel: interrupt: workaround qemu_x86 interrupt issue
qemu_x86 seems to take an extra instruction after the sti instruction
(irq_unlock) happens before it posts the interrupts.  This can issues
if the instruction after the sti ends up reading the state that is
suppose to be updated by the ISR handler.

We see this behavior when building with LLVM.  To workaround this issue
we add an arch_nop() to provide an extra instruction to allow the
interrupts to post.

Opened zephyrproject-rtos/sdk-ng#629 to track qemu issue.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-02-21 16:17:20 -05:00
Anas Nashif
e21cc69c90 tests: kernel: cleanup test meta-data
Mostly tag cleanup and fixing issues related to bad filtering in the
link_generator scenarios.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-11-04 22:13:54 -04:00
Kumar Gala
4f0166088c tests: move to using CONFIG_MP_MAX_NUM_CPUS
For tests that set CONFIG_MP_NUM_CPUS, switch to using
CONFIG_MP_MAX_NUM_CPUS instead as we work to phase out
CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Stephanos Ioannidis
384ff96b25 Revert "tests: kernel: interrupt: Disable on ARM64 QEMU targets"
This reverts the commit 7d8a119213
because GCC is now configured to not emit ldp/stp Qn instructions for
consecutive 32-byte loads and stores, and the nested interrupt handling
failure due to the missing emulation of these instructions no longer
occurs.

For more details, refer to the GitHub issue #49491 and #49806.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-23 12:10:25 +02:00
Stephanos Ioannidis
7d8a119213 tests: kernel: interrupt: Disable on ARM64 QEMU targets
This commit disables the `arch.interrupt` test on the ARM64 QEMU
targets (`qemu_cortex_a53` and `qemu_cortex_a53_smp`) because the
nested interrupt test fails when compiled with GCC 12.

Revert this commit when the GitHub issue #49491, which tracks this bug,
is fixed.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-08-29 16:57:18 +02:00
Fabio Baltieri
def230187b test: fix more legacy #include paths
Add a bunch of missing "zephyr/" prefixes to #include statements in
various test and test framework files.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-08-02 16:41:41 +01:00
Enjia Mai
b7f1e98724 tests: kernel: move the interrupt tests to new ztest API
Migrate the testsuite tests/kernel/interrupt to the new ztest API.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-12 13:21:47 -04:00
Enjia Mai
b3d442ec87 tests: kernel: move the direct interrupt test to arch testing
Move the direct interrupt test to tests/arch/x86/direct_isr. Two
reasons:
1. The direct interrupt is only for x86. It's arch-specific.
2. And it need extra gcc option to pass the build, that will
include testsuite number. Although it seems like we add a
extra testsuite for it, actually we can reduce whole tests
configuration in tests/kernel/interrupt. And also make this
test more generic as it used to be.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-12 13:21:47 -04:00
Carlo Caione
e3f3aba989 arch: Use a common place for z_irq_spurious
Every architecture must export the z_irq_spurious definition. Just unify
that in one single header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 15:24:39 -04:00
Chen Peng1
bae794e300 test: interrupt: change the test interrupt line to a bigger one.
change the test interrupt line number to a bigger one, because
the low number usually will be used by other devices.

Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
2022-06-23 09:08:43 +02:00
Gerard Marull-Paretas
ade7ccb918 tests: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:02:14 +02:00
Nazar Kazakov
f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Andy Ross
53c8d61529 tests/kernel/interrupt: Don't wait so long just for a tick
There's no reason to wait a whole second here just to know if a tick
should have fired (though, yes, on some older/legacy/non-tickless
configurations, 128 ticks is actually more than a second).

Some simulators are very slow; busy waiting is expensive.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-26 13:34:45 -05:00
Enjia Mai
e61e63e33f tests: interrupt: refine the interrupt testcases
This PR include 2 changes to refine the testcases:
1. Now we using IPI to trigger interrupt in testing instead of INT
   instruction, this means we don't need to hardcode the vector
   number. That can avoid some problem.

Fixes: #40374

2. Refined the test cases. Tigger interrupt by INT instruction and
   IPI cannot be masked by irq_disabled(). Unless it's a external
   interrupt, such as a timer. Now remove those incorrect part of
   these testcases.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2022-01-18 13:24:28 -05:00
Torsten Rasmussen
2760fb9eda tests: added kernel tests for arm arch with linker script generator
This commit adds an additional test case for several kernel test suites
to ensure that the linker script generator is working correctly for a
subset of the Zephyr test suites.

The ensures that the basic functionality of the linker script generator
is working while still keep the performance impact on CI at a minimal
level.

Using the kernel tests is a trade-off between testing coverage of the
linker script generator and the time it takes to complete CI.

The kernel tests is considered to have the broadest coverage of various
features important for the generated linker script.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00