Commit graph

240 commits

Author SHA1 Message Date
Mathieu Choplain
b1b85fcf48 drivers: intc: stm32: remove STM32_EXTI_LINE_NONE macro
The EXTI driver API defined in exti_stm32.h is reserved for exclusive usage
by the STM32 GPIO driver, which doesn't use this macro. Since there is no
usecase for it anyways, it can be removed for future-proofing.

The STM32 UART driver is an unintended user of this definition, however.
Replace it with a private #define which is more appropriate anyways.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-08-27 10:50:39 -04:00
Pisit Sawangvonganan
a2e0b1d366 drivers: serial: remove '&' when assigning init_fn
Remove address-of operator ('&') when assigning `init_fn`
function pointer in `DEVICE_DT_INST_DEFINE` macro.

This change aims to maintain consistency among the drivers in
`drivers/serial`, ensuring that all function pointer assignments
follow the same pattern.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-07-27 20:48:34 +03:00
Pisit Sawangvonganan
f503b7a26d drivers: serial: stm32: replace config parameter with usart
Updated function parameters from `const struct uart_stm32_config *config`
to `USART_TypeDef *usart`. This change reduces the level of pointer
indirection, which minimizes repeated dereferencing and helps reduce
the overall code size.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-05-28 09:49:09 +02:00
Pisit Sawangvonganan
86e0fe13e1 drivers: serial: stm32: reduce pointer level from config->usart to usart
This change reduces the level of pointer indirection, which minimizes
repeated dereferencing and helps reduce the overall code size.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-05-28 09:49:09 +02:00
Abderrahmane Jarmouni
e783aafdd0 drivers: uart_stm32: add DCache support in async DMA mode
Adapt the driver to verify if DMA buffers are located in noncacheable
memory when DCache is activated, in order to avoid cache coherency issues.
This is required until manual cache coherency management is implemented.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-13 16:09:20 -04:00
Abderrahmane Jarmouni
4affeaab20 drivers: serial: uart_stm32: fix for async_rx_buf_rsp
uart_stm32_async_rx_buf_rsp() does not return the necessary errors when
rx_next_buffer is already set & when async uart rx is disabled.
This patch was submitted by @mkaranki

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-02-26 14:30:27 +01:00
Guillaume Gautier
c1327db630 drivers: serial: stm32: always enable clock when exiting low power
Systematically enable the UART clock again when exiting a low power mode
before reading the UART register.
Even though the previous code worked on STM32WBA, for most series, it is
necessary to enable the clock to access the registers, otherwise they read
as 0.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-02-06 08:48:05 -06:00
Roman Studenikin
260fc89643 drivers: use DT_INST_PROP over DT_INST_PROP_OR if possible
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:

	.single_wire = DT_INST_PROP_OR(index, single_wire, false),	\
	.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false),	\

This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:

	.single_wire = DT_INST_PROP(index, single_wire),		\
	.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap),			\

Signed-off-by: Roman Studenikin <srv@meta.com>
2024-01-30 00:26:58 +00:00
Guillaume Gautier
0792a85f77 drivers: serial: stm32: add reinit after standby
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-25 08:55:02 +01:00
Guillaume Gautier
be26c71fd4 drivers: serial: stm32: prevent suspend to ram when operation in progress
Prevent the system to enter Suspend to RAM state while UART operation is
in progress.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-25 08:55:02 +01:00
Pisit Sawangvonganan
b4567fa551 drivers: serial: correct spelling
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/serial directory.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-13 00:24:36 +00:00
Erwan Gouriou
d2ea9e4806 drivers: serial: stm32wba: Suspension required before stop in DMA Tx abort
In a previous change, STM32U5 GPDMA specific behavior was set into a
specific configuration applying only to few devices impacted by a specific
silicon erratum.
As part of this change, dma suspension before dma stop was set to apply
to the specific erratum workaround.
It appears, this was wrong and dma suspension before dma stop should
be done on all devices compatible with stm32u5 dma. This fix re-instantiate
the correct behavior.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Erwan Gouriou
ad1594ee75 drivers: serial: stm32: Small code refactoring
Wakeup-source configuration is about configuring registers.
It belongs to uart_stm32_registers_configure().

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Erwan Gouriou
0c541d7ad0 drivers: uart: stm32: Allow enabling FIFO mode
Add required bits to allow FIFO mode enabling.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Dawid Niedzwiecki
7388970c85 serial: stm32: do not clear TC flag in async mode
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.

The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.

There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-11-30 10:04:57 +01:00
Erwan Gouriou
a38c8d25e7 drivers: serial: stm32u5: Serial wakeup is based on autonomous capability
On some devices such as STM32U5, there is no UART WKUP dedicated registers
as the hardware block has an integrated autonomous wakeup capability.
Hence it's capable to wake up the device from stop modes (down to Stop 1).

This behavior relies on RCC UESM bit which is enabled by default at reset
and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple
configuration. This might be changed later on, if a need is seen to disable
UESM bit.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 16:41:40 +00:00
Erwan Gouriou
d7513fb526 driver: serial: stm32u5: DMAT Errata behavior valid only on some SoCs
Workaround for DMAT errata was applied on all SoCs declaring STM32U5
DMA compatible.
This errata has been fixed in later SoCs revisions and should not be
applied anymore as this can cause compatibility issues with power mgmt
(can not enter STOP1 in some cases).

Declare a specific Kconfig symbol to restrict the workaround only to the
set of SoCs impacted by the issue and requiring workaround.

Note that I preferred using Kconfig over device tree since it doesn't feel
right to declare a compatible on a silicon bug base.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 15:49:57 +01:00
Erwan Gouriou
e5ab70b724 drivers: uart: stm32: Complete wakeup feature
Serial wakeup feature was only working whe DBG in Stop mode setting
was enabled.
Add required changes to make it functional also when this configuration
isn't set.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 14:22:22 +01:00
Bjarki Arge Andreasen
f9b42bc911 drivers: serial: uart_stm32.c: RxDataFlush on async_rx_enable
When enabling async RX the first time after boot, there is an
additional byte received with the first RX_DATA_RDY event,
which seems to be caused by the RX data not being flushed before
enabling the UART RX DMA.

Adding a request to flush the RX data register before enabling
the RX DMA, solves the issue.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2023-11-20 10:48:41 -06:00
Nando Galliard
b9748b5377 drivers: serial: Support STM32 LPUART if LPUART1 is not defined.
When LPUART1 is not defined, the driver did not compile even if
any other LPUART was defined. This patch fixes that.

Signed-off-by: Nando Galliard <nando.galliard@protonmail.com>
2023-10-17 14:30:38 +01:00
Erwan Gouriou
179d435a30 Revert "drivers: serial: stm32: Make it compatible with runtime PM ....
This reverts commit 1c2d326579.
which was limited to CONFIG_UART_ASYNC_API=y case and causing regression
otherwise.

Fixes #63885

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-10-13 10:06:04 +01:00
Erwan Gouriou
1c2d326579 drivers: serial: stm32: Make it compatible with runtime PM on console
Since #53979, runtime PM can be applied on serial device used by console.
While it should be transparent on serial driver side as the application
(console in this case) is driving the PM runtime requests, on STM32
it requires some modification on serial driver as UART interrupts are
generated to handle internal power management house cleaning.
When these interrupts are generated, PM runtime should also be driven
to ensure clock availability when treating the uart ISR.
On STM32, some additional changes are required

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-10-11 11:12:03 +03:00
Kenneth J. Miller
044de03d57 drivers: serial: stm32: Fix flawed runtime config check
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
5217a17214 drivers: serial: stm32: Consolidate UART config
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
31a6e31cee drivers: serial: stm32: Refactor for PM handling
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
c8ffeb47f7 drivers: serial: stm32: Add persistent uart_config struct
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.

Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.

Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
bde1cd8d38 drivers: serial: stm32: Move boot-time config to data
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
2531d70ad2 drivers: serial: stm32: Make header file self-contained
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.

This promotes a more modular file structure.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Jeroen van Dooren
6ab706913a drivers: serial: stm32: add wide data support
Add wide data support to STM32.
Validated interrupt driven code on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren
435d5d1a94 drivers: serial: stm32: rework code for max re-use in wide data support
Restructuring code for poll_in/poll_out/fifo_fill/fifo_read because for
wide data support, all code is identical except the calls to
LL_USART_{ReceiveData8/TransmitData8}.
This allows both implementations, 8 and 9 bit data-width to call a
visitor function, passing the either the 8 bit or 9 bit data-width
function pointer.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren
250e1f93ca drivers: serial: stm32: prevent stop/data-bits HW support code duplication
Preventing code duplication of macros checking for HW support on
stop bits and data-bits during runtime configuration.
Validated runtime configuration on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Sean Nyekjaer
d0651a8d96 drivers: serial: stm32: void return value from reset_line_toggle_dt
Suggested-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:57:12 +00:00
Daniel Leung
9f02eeadf8 serial: allow callback setting to be exclusive
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.

Fixes #48606

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-18 11:13:02 +00:00
Armin Brauns
b95cdb2a33 drivers: serial: stm32: add support for RS485 configuration
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.

This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.

This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:

$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
    grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
    cut -d/ -f6 |\
    sort -u

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-07-07 13:16:27 +02:00
Francois Ramu
d69f7636e3 drivers: serial: stm32 uart driver asserts when baudRate >=16
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-05-30 13:16:05 -04:00
Abram Early
a59c948256 drivers: serial: stm32 uart implements driver enable
Enables the use of the hardware DE pin provided by an stm32 UART using
device tree flags.

Signed-off-by: Abram Early <abram.early@gmail.com>
2023-05-26 14:55:30 -04:00
Cyril Fougeray
1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Francois Ramu
1b2942ffee drivers: serial: stm32U5 uart driver do not toggle the DMA Tx request
Errata sheet of the stm32U5 (ES0499) recommends to avoid clearing
the DMAT bit with LL_USART_DisableDMAReq_TX to re-start
a DMA transfer on the UART Tx block. The function becomes empty.
This is also seen for stm32H5.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-20 10:44:07 +02:00
Francois Ramu
7dff172519 drivers: serial: stm32 uart driver avoid LOG_WRN when going to sleep
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-09 13:14:46 +01:00
Cyril Fougeray
51fa86bb98 drivers: exti: stm32: expose STM32_EXTI_LINE_NONE
Common STM32_EXTI_LINE_NONE for declaration and setting
of wakeup EXTI line when configured.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-01-27 01:02:08 +09:00
Dawid Niedzwiecki
4a2a512c11 drivers: serial: fix STM32 async uart driver
Fix a bug that causes not handling an IDLE line detection interrupt for
some STM chips, e.g. STM32F412. It impacts the async UART
communication - an information that data have been recieved is lost.

The issue occurs when the IDLE flag is set during handling another UART
interrupt, e.g Transmission complete. The ISR calls uart_stm32_err_check
function, which clears the noise error flag with LL_USART_ClearFlag_NE
without any additional checks. Unfortunately, clearing the noise flag
also clears the IDLE flag for some chips(an read to the USART_SR
register followed by a read to the USART_DR register for STM32F412
clears PE, FE, NF, ORE and IDLE flags), hence the ISR is not called
again for the IDLE event. The IDLE flag is no longer set.

Add checking the noise flag before clearing it.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2023-01-04 10:33:49 +01:00
Patryk Duda
1aebcec02f drivers: serial: Reset UART using RCC before initialization
In multi-image environment, after jump to the image we can have UART in
unexpected state. Reset UART to default state to make sure that UART is
initialized properly and won't cause system to crash or hang.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-09 09:43:36 -08:00
Francois Ramu
e00f91da41 drivers: serial: uart driver for stm32U5 suspends dma channel
When DMA transfer is enabled on the stm32U5,
the UART Tx channel must be suspended before stopping.
This will let the on-going transfer ends properly

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Francois Ramu
0300b34cf0 drivers: serial: stm32 UART driver do not start Rx timer if null
This commit is optimizing the uart isr execution to avoid starting
the Rx timeout if it is null. In anycase the async_timer_start
function is checking the tiemout value. This will just save some
execution lines.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Wouter Cappelle
984b612c48 drivers: uart: stm32 async uart driver should free next buffer
When disabling async rx, the next buffer is not free-ed by
the stm32 uart driver.

Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
2022-10-19 16:05:25 +02:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Francois Ramu
9926b90bf6 drivers: uart: stm32 uart driver must include ll_exti with CONFIG_PM
Missing include to compile correctly when the
CONFIG_PM && IS_UART_WAKEUP_FROMSTOP_INSTANCE are defined

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-16 10:49:18 +00:00
Francois Ramu
0e119b53c6 drivers: serial: stm32 uart driver set EXTI line for wakeup from lowPower
The USART or LPUART, especially on stm32wl, must set the EXTI
lines corresponding to the wakeUp source.
This LL_EXTI_LINE_xx is given by the Device Tree property.
This makes the system exiting lowpower stop mode on EXTI irq.
The LL_EXTI_LINE_x is exactly the bit(X) set.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-15 15:02:47 +00:00
Francois Ramu
7b95803218 drivers: serial: stm32 uart check baudrate register value
The baudrate register (BRR) of a stm32 USART cannot be lower than 16.
The baudrate register (BRR) of a stm32 LPUART cannot be lower than 0x300
and greater than 0xFFFFF.
Add assertion to check the range.
This could be the case when configuring a baudrate of 9600 on usart
clocked by LSE (32768Hz).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-09 10:11:23 +02:00
Gerard Marull-Paretas
a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00