Commit graph

90 commits

Author SHA1 Message Date
Adrien MARTIN
c1ae6e5b4e soc: stm32g0: add fdcan2
The STM32G0 soc has 2 CAN controllers. The 2nd on was not working
with zephyr yet as both controllers shares the same IRQ. Recently, the
shared irq system was integrated on now, both can controllers can work
on this chip. Shared interrupts must be enabled only if both can
controllers are enabled.

Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
2024-01-25 16:01:40 +00:00
Torsten Rasmussen
4812884f84 cmake: arm: update arm SoC to use SOC_LINKER_SCRIPT variable
This commit updates all arm SoCs to set SOC_LINKER_SCRIPT CMake
variable to point to active linker script directly.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2023-11-03 11:01:23 +01:00
Roland Lezuo
f4c901b82d soc: arm: st_stm32: add config to allow debugger attach in sleep/stop modes
Adds CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP to allow debugger attaching in
sleep/stop mode of STM32 parts. Mainly useful for debugging. Move DBGMCU
from part-sepcific power.c to common soc_config.c. CONFIG_USE_SEGGER_RTT
depends on this as well.

Signed-off-by: Roland Lezuo <roland.lezuo@embedded-solutions.at>
2023-09-22 15:31:47 +02:00
Huifeng Zhang
2c22e83dfb include: arch: arm: Remove aarch32 directory
This commit follows the parent commit work.

This commit introduces the following major changes.

  1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
    to the 'include/zephyr/arch/arm' directory.

  2. Change the path string which is influenced by the changement 1.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-09-13 10:08:05 +01:00
Gerard Marull-Paretas
9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Gerard Marull-Paretas
55f5a75c58 pm: remove unnecessary __weak from pm_state_set/pm_exit_post_ops
Remove unnecessary __weak attribute from power management functions.
These functions are now defined once, globally, and mandatory for
systems that support CONFIG_PM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-07-20 10:33:00 +00:00
Gerard Marull-Paretas
3d2194f11e pm: introduce HAS_PM
Add a new Kconfig option that has to be selected by SoCs providing PM
hooks. This option will be now required to enable CONFIG_PM. Before this
change, CONFIG_PM could always be enabled, regardless of SoC providing
any kind of low-power support.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-07-20 10:33:00 +00:00
Gerard Marull-Paretas
fcaa259e22 soc: arm: remove all unnecessary NMI_INIT() calls
NMI_INIT() is now a no-op, so remove it from all SoC code. Also remove
the irq lock/unlock pattern as it was likely a cause of copy&paste when
NMI_INIT() was called.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-07-05 09:15:36 +02:00
Gerard Marull-Paretas
a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Gerard Marull-Paretas
d925c660ed drivers: pinmux: stm32: drop driver
Drop STM32 pinmux driver in favor of pinctrl. Some definitions located
in pinmux headers were used by the pinctrl driver, so they have been
moved there.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-23 16:56:04 -05:00
Gerard Marull-Paretas
8a6cf41016 include: add missing nmi.h include
Some files make use of NMI API (NMI_INIT()) without including the
appropriate headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
acc8cb4bc8 include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Erwan Gouriou
f818b0478d drivers/timer: stm32: Enable lptim driver based on dt status
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Thomas Stranger
a41606ec52 soc: arch: stm32g0: fix strobe init for g070 an g0b0
The STM32G070 and STM32G0B0 Socs don't have USB power delivery support
but the PINs PD0, PD2, PB15, PA8 pins of these still have the same
pull down on boot configuration options as the SOCs with UCPD support.

This commit skips the check if such a peripheral is enabled,
therefore the configuration will always be applied on these SOCs
and the compile error is resolved.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-09-01 10:28:48 +02:00
Aurelien Jarno
72dab5bda9 soc: arm: stm32g0: fix USB-C PD dead battery support
Currently the USB-C PD dead battery support is disabled very early in
the boot process, in order to give access to CC1 and CC2 pins to the
application. However this breaks dead battery support as this instructs
the PD source to stop delivering power.

This commit changes the behavour to keep the internal pull-up in dead
battery pins enable if the UCPD driver is enabled, and the corresponding
UCPD peripheral is also enabled. The code is a bit complex as it aims to
support possible G0 devices with a single UCPD controller (as opposed to
the current one), and also because I haven't found any simple way to
match the UCPD peripheral with the bits in the SYSCFG_CFGR1 register (I
used the same trick with the base address as in the driver).

Given I have not been able to get that working with macros, the check is
done at "runtime", however GCC is smart enough to optimize the code. The
generated code is identical if none of the UCPD peripheral is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-08-15 08:20:29 +00:00
Gerard Marull-Paretas
d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas
0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Sam Hurst
0a9e8fb9ea pm: Remove extraneous "info" statement left over from PR #42041
Remove extraneous "info" statement left over in file stm32g0/power.c

Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-02-25 11:23:02 -05:00
Flavio Ceolin
78454e5e93 pm: Rename pm_power_state_exit_post_ops
Aligning with the rest of PM API, replace pm_power_state_exit_post_ops
with pm_state_exit_post_ops.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-02-23 07:33:46 -05:00
Flavio Ceolin
89fee61b43 pm: Rename pm_power_state_set
Aligning with the rest of PM API, replace pm_power_state_set with
pm_state_set.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-02-23 07:33:46 -05:00
Carlo Caione
c5894df5ec pm: Change parameters of pm_power_state_{set,exit_post_ops}
Just pass state and substate_id instead of the whole info structure
pointer.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-02-21 20:58:01 -05:00
Carlo Caione
11f1dd2370 pm: Reference pm_state_info only by pointer
It's unnecessary to move the pm_state_info around by value, just use a
pointer.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-02-21 20:58:01 -05:00
Francois Ramu
1b8d2d3dad soc: arm: stm32 mcus should execute stm32_power_init in PRE_KERNEL_1
Change the stm32_power_init to be executed PRE_KERNEL_1
for all the devices with the low power mode (power.c)
When GPIO and UART are not yet up and running.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-18 13:17:39 -05:00
Erwan Gouriou
7f2e792bda soc: stm32g0: Clock is required to write DBGMCU registers
If clock is not enabled write access on that registers are no-op.
Disable clock after operation to avoid conflicts with openocd which
can also access this clock when flashing.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-09-23 12:54:03 -04:00
Gerard Marull-Paretas
994c77a927 soc: arm: st_stm32: do not enable PM_DEVICE by default
CONFIG_PM_DEVICE was a de-facto requirement when enabling CONFIG_PM=y
since some device, i.e. UART, used the PM device hooks to block
suspension process while the device was busy finishing transmission.
This has now been fixed using constraints, so CONFIG_PM=y can be enabled
without further requirements.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-14 08:36:33 -04:00
Erwan Gouriou
31b7483a99 soc: stm32g0: pm_power_ functions should be __weak
In commit "pm: Fix weak linkage symbols" (PR #35274),
PM SoC hooks were converted to __weak to avoid clash with
new definition of these symbols in subsys/pm/power.c.

G0 power implementation was implemented in parallel
with this change and missed the update.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-09-08 09:29:56 -04:00
Yong Cong Sin
f7ba9ce226 soc: arm: stm32g0: Add PM support
Low power modes for the STM32G0 series.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-09-03 09:42:09 -04:00
Thomas Stranger
63478aba48 soc/arm: add support for stm32g0 socs with (hw aes and) rng support
This commit introduces g041, g061, g081, and g0c1 socs in kconfig.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Francois Ramu
5a51fe515a soc: arm: stm32g0 with USB-C PD cannot use CC1 and CC2 pins by default
With this patch, the UCPD1 _CC1 and _CC2 pins
are disabling the USB Type-C and Power Delivery Dead Battery.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-09 14:53:57 -04:00
Thomas Stranger
c743beec64 soc/arm/st_stm32: Add additional stm32g0 socs
Add soc configuration for g05x and g0bx socs.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Martin Jäger
c741d7598a soc: arm: stm32xx: soc.h: final cleanup of LL headers
Final cleanup to unify soc.h files and remove remaining non-generic
LL headers.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
9e316e6040 drivers: interrupt_controller: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
d5aff7ba3c drivers: clock_control: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
92e16191ac drivers: gpio: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
42eb8d7336 drivers: i2c: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
fc1c284c9c drivers: pwm: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
39d388287f drivers: hwinfo: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
d73bfcbdc8 drivers: iwdg: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
c3c3073c95 drivers: wwdg: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Gerard Marull-Paretas
e83fab32d7 drivers: serial: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-24 17:22:27 +01:00
Eric Hay
e51b24b429 drivers: clock_control: stm32g0: Enable the Q divisor on g0X1 variants
The PLL Q divisor does not exist on stm32g0X0 variants. It should only
be configured for g0X1 variants.

Signed-off-by: Eric Hay <EHay@sierrawireless.com>
2020-10-09 11:49:39 +02:00
Eric Hay
31fca27d83 soc: arm: stm32g0: Set IRQs to 30 for stm32g070 series
The number of IRQs for the g070 is 30, not 32.

Signed-off-by: Eric Hay <EHay@sierrawireless.com>
2020-10-09 11:49:39 +02:00
Eric Hay
5f42ba52d8 soc: arm: stm32g0: add STM32G070 SoC series
This commit adds support for the STM32G070xx SoCs
by STMicroelectronics.

Signed-off-by: Eric Hay <EHay@sierrawireless.com>
2020-10-09 11:49:39 +02:00
Erwan Gouriou
d1afd83df0 drivers/pinmux: stm32: provide dt pinctrl to gpio driver interface
Provides tool set to be used by device drivers in order to be able
to configure device signals.
This does not involve the implementation of a dedicated pinctrl
driver. In this regard, this is equivalent to implementation used
for treatment of current pinmux.c files.

Since STM32F1 uses a different GPIO configuration scheme, its
support is exlcuded for now.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Gerard Marull-Paretas
528a98ba3f drivers: pwm: stm32: refactor driver using LL API
The PWM drivers has been refactored using the HAL LL API. Not only that,
but the set pin_set function is now faster, as channel output compare is
just initialized if needed.

NOTE: Has been tested using H743zi board for now.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-06-19 15:18:50 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Kumar Gala
463bce59e4 dts: Remove dts_fixup.h
Remove all remaining dts_fixup.h as all defines in the files are no
longer utilized.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 15:46:50 +02:00
Erwan Gouriou
068e2b9032 soc: stm32: Cleanup DT_FLASH_DEV_NAME
No more needed

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-29 13:13:58 -05:00