soc: arm: stm32g0 with USB-C PD cannot use CC1 and CC2 pins by default
With this patch, the UCPD1 _CC1 and _CC2 pins are disabling the USB Type-C and Power Delivery Dead Battery. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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@ -16,6 +16,10 @@
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#include <arch/arm/aarch32/cortex_m/cmsis.h>
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#include <linker/linker-defs.h>
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#include <string.h>
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#if defined(SYSCFG_CFGR1_UCPD1_STROBE) || defined(SYSCFG_CFGR1_UCPD2_STROBE)
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#include <stm32_ll_system.h>
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#include <stm32_ll_bus.h>
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#endif /* SYSCFG_CFGR1_UCPD1_STROBE || SYSCFG_CFGR1_UCPD2_STROBE */
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/**
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* @brief Perform basic hardware initialization at boot.
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@ -44,6 +48,12 @@ static int stm32g0_init(const struct device *arg)
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/* At reset, system core clock is set to 16 MHz from HSI */
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SystemCoreClock = 16000000;
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#if defined(SYSCFG_CFGR1_UCPD1_STROBE) || defined(SYSCFG_CFGR1_UCPD2_STROBE)
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/* Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
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LL_SYSCFG_DisableDBATT(LL_SYSCFG_UCPD1_STROBE | LL_SYSCFG_UCPD2_STROBE);
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#endif /* SYSCFG_CFGR1_UCPD1_STROBE || SYSCFG_CFGR1_UCPD2_STROBE */
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return 0;
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}
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